DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 1217

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DS72030W200FPV

Manufacturer Part Number
DS72030W200FPV
Description
MPU, 32BIT, SH7203, ROMLESS, 240QFP
Manufacturer
Renesas Electronics America
Series
SH7200r
Datasheet

Specifications of DS72030W200FPV

Core Size
32bit
Program Memory Size
32KB
Cpu Speed
200MHz
Digital Ic Case Style
QFP
No. Of Pins
240
Supply Voltage Range
1.1V To 1.3V
Operating Temperature Range
-20°C To +85°C
Svhc
No SVHC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
(when URST = 1, DVST is set to 1.)
(when URST = 1, DVST is set to 1.)
USB bus reset detection
Note: The URST, SADR, SCFG and SUSP bits in parentheses are enable bits that permit or block setting of the DVST bit to 1 by this module
(when URST = 1, DVST is set to 1.)
when the corresponding stage transition is detected. (These enable bits are on INTENB0.)
Stage transitions are carried out even if setting the DVST bit to 1 is inhibited by these bits.
SetAddress execution
(configuration value = 0)
(Address = 0)
USB bus reset detection
(when SADR = 1,
DVST is set to 1.)
SetConfiguration
execution
(DVSQ = 100)
(DVSQ = 001)
(DVSQ = 010)
(DVSQ = 011)
Powered
Configured
Address
state
Default
state
state
state
Figure 23.6 Device State Transitions
(when SCFG = 1, DVST is set to 1.)
(when SADR = 1, DVST is set to 1.)
(when SUSP = 1, DVST is set to 1.)
(when SUSP = 1, DVST is set to 1.)
(when SUSP = 1, DVST is set to 1.)
(when SUSP = 1, DVST is set to 1.)
SetConfiguration execution
(configuration value = 0)
Suspended state detection
Suspended state detection
Resume (RESM is set to 1)
Suspended state detection
Resume (RESM is set to 1)
SetAddress execution
Suspended state detection
Resume (RESM is set to 1)
Resume (RESM is set to 1)
Section 23 USB 2.0 Host/Function Module (USB)
(DVSQ = 100)
Suspended
(DVSQ = 101)
(DVSQ = 110)
(DVSQ = 111)
Suspended
Suspended
Suspended
Rev. 3.00 Sep. 28, 2009 Page 1185 of 1650
state
state
state
state
REJ09B0313-0300

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