DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 371

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DS72030W200FPV

Manufacturer Part Number
DS72030W200FPV
Description
MPU, 32BIT, SH7203, ROMLESS, 240QFP
Manufacturer
Renesas Electronics America
Series
SH7200r
Datasheet

Specifications of DS72030W200FPV

Core Size
32bit
Program Memory Size
32KB
Cpu Speed
200MHz
Digital Ic Case Style
QFP
No. Of Pins
240
Supply Voltage Range
1.1V To 1.3V
Operating Temperature Range
-20°C To +85°C
Svhc
No SVHC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
(6)
A write access ends in one cycle when data is written in a cache-disabled space and the data bus
width is larger than or equal to access size. As a single write or burst write with burst length 1 is
set in SDRAM, only the required data is output. The write access that ends in one cycle is called
single write. Figure 9.21 shows the single write basic timing.
Single Write
Figure 9.21 Single Write Basic Timing (Auto-Precharge)
RASL, RASU
CASL, CASU
Notes: 1. Address pin to be connected to pin A10 of SDRAM.
A12/A11*
D31 to D0
A25 to A0
DACKn*
RD/WR
DQMxx
CKIO
2. The waveform for DACKn is when active low is specified.
CSn
BS
1
2
Tr
Tc1
Trwl
Rev. 3.00 Sep. 28, 2009 Page 339 of 1650
Tap
Section 9 Bus State Controller (BSC)
REJ09B0313-0300

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