DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 1292
DS72030W200FPV
Manufacturer Part Number
DS72030W200FPV
Description
MPU, 32BIT, SH7203, ROMLESS, 240QFP
Manufacturer
Renesas Electronics America
Series
SH7200r
Datasheet
1.R5S72030W200FP.pdf
(1686 pages)
Specifications of DS72030W200FPV
Core Size
32bit
Program Memory Size
32KB
Cpu Speed
200MHz
Digital Ic Case Style
QFP
No. Of Pins
240
Supply Voltage Range
1.1V To 1.3V
Operating Temperature Range
-20°C To +85°C
Svhc
No SVHC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Section 24 LCD Controller (LCDC)
24.3.17 LCDC Power Management Mode Register (LDPMMR)
LDPMMR controls the power supply circuit that provides power to the LCD module. The usage
of two types of power-supply control pins, LCD_VCPWC and LCD_VEPWC, and turning on or
off the power supply function are selected.
Initial value:
Rev. 3.00 Sep. 28, 2009 Page 1260 of 1650
REJ09B0313-0300
Bit
15
14
13
12
11
10
9
8
7
R/W:
Bit:
ONC3
R/W
15
0
Bit Name
ONC3
ONC2
ONC1
ONC0
OFFD3
OFFD2
OFFD1
OFFD0
⎯
ONC2
R/W
14
0
ONC1
R/W
13
0
Initial
Value
0
0
0
0
0
0
0
0
0
ONC0 OFFD3 OFFD2 OFFD1 OFFD0
R/W
12
0
R/W
11
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R/W
10
0
Description
LCDC Power-On Sequence Period
Set the period from LCD_VEPWC assertion to
LCD_DON assertion in the power-on sequence of the
LCD module in frame units.
Specify to the value of (the period) -1.
This period is the (c) period in figures 24.4 to 24.7,
Power-Supply Control Sequence and States of the LCD
Module. For details on setting this register, see table
24.6, Available Power-Supply Control-Sequence
Periods at Typical Frame Rates. (The setting method is
common for ONA, ONB, OFFD, OFFE, and OFFF.)
LCDC Power-Off Sequence Period
Set the period from LCD_DON negation to
LCD_VEPWC negation in the power-off sequence of
the LCD module in frame units.
Specify to the value of (the period) -1.
This period is the (d) period in figures 24.4 to 24.7,
Power-Supply Control Sequence and States of the LCD
Module.
Reserved
This bit is always read as 0. The write value should
always be 0.
R/W
9
0
R/W
8
0
R
7
0
-
VCPE
R/W
6
0
VEPE
R/W
5
0
DONE
R/W
4
1
R
3
0
-
R
2
0
-
R
1
0
LPS[1:0]
R
0
0
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