DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 1331

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DS72030W200FPV

Manufacturer Part Number
DS72030W200FPV
Description
MPU, 32BIT, SH7203, ROMLESS, 240QFP
Manufacturer
Renesas Electronics America
Series
SH7200r
Datasheet

Specifications of DS72030W200FPV

Core Size
32bit
Program Memory Size
32KB
Cpu Speed
200MHz
Digital Ic Case Style
QFP
No. Of Pins
240
Supply Voltage Range
1.1V To 1.3V
Operating Temperature Range
-20°C To +85°C
Svhc
No SVHC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
24.6
24.6.1
Follow the procedure below to halt access to VRAM for storing display data (synchronous DRAM
in area 3).
• Procedure for Halting Access to Display Data Storage VRAM:
This halting procedure is required before selecting self-refreshing for the display data storage
VRAM (synchronous DRAM in area 3) or making a transition to standby mode or module standby
mode.
1. Confirm that the LPS1 and LPS0 bits in LDPMMR are currently set to 1.
2. Clear the DON bit in LDCNTR to 0 (display-off mode).
3. Confirm that the LPS1 and LPS0 bits in LDPMMR have changed to 0.
4. Wait for the display time for a single frame to elapse.
Usage Notes
Procedure for Halting Access to Display Data Storage VRAM (Synchronous
DRAM in Area 3)
Rev. 3.00 Sep. 28, 2009 Page 1299 of 1650
Section 24 LCD Controller (LCDC)
REJ09B0313-0300

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