DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 838

• Manufacturer Part Number: DS72030W200FPV
• Description: MPU, 32BIT, SH7203, ROMLESS, 240QFP
• Manufacturer: Renesas Electronics America
• Series: SH7200r

Specifications of DS72030W200FPV

• Core Size: 32bit
• Program Memory Size: 32KB
• Cpu Speed: 200MHz
• Digital Ic Case Style: QFP
• No. Of Pins: 240
• Supply Voltage Range: 1.1V To 1.3V
• Operating Temperature Range: -20°C To +85°C
• Svhc: No SVHC
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Section 16 Synchronous Serial Communication Unit (SSU)
16.3.8
SSRDR is an 8-bit register that stores receive data. When 8-bit data length is selected by bits
DATS1 and DATS0 in SSCRL, SSRDR0 is valid. When 16-bit data length is selected, SSRDR0
and SSRDR1 are valid. When 32-bit data length is selected, SSRDR0 to SSRDR3 are valid. The
SSRDR that has not been enabled must not be accessed.
When the SSU has received 1-byte data, it transfers the received serial data from SSTRSR to
SSRDR where it is stored. After this, SSTRSR is ready for reception. Since SSTRSR and SSRDR
function as a double buffer in this way, consecutive receive operations can be performed.
Read SSRDR after confirming that the RDRF bit in SSSR is set to 1.
SSRDR is a read-only register, therefore, cannot be written to by the CPU.
Table 16.4 Correspondence between DATS Bit Setting and SSRDR
Rev. 3.00 Sep. 28, 2009 Page 806 of 1650
REJ09B0313-0300
Bit
7 to 0
SSRDR
0
1
2
3
Bit Name
SS Receive Data Registers 0 to 3 (SSRDR0 to SSRDR3)
00
Valid
Invalid
Invalid
Invalid
Initial value:
Initial
Value
All 0
R/W:
Bit:
R/W
R
R
7
0
01
Valid
Valid
Invalid
Invalid
R
6
0
Description
Serial receive data
R
5
0
DATS[1:0] (SSCRL[1:0])
R
4
0
R
3
0
10
Valid
Valid
Valid
Valid
R
2
0
R
1
0
11 (Setting Disabled)
Invalid
Invalid
Invalid
Invalid
R
0
0