DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 863

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DS72030W200FPV

Manufacturer Part Number
DS72030W200FPV
Description
MPU, 32BIT, SH7203, ROMLESS, 240QFP
Manufacturer
Renesas Electronics America
Series
SH7200r
Datasheet

Specifications of DS72030W200FPV

Core Size
32bit
Program Memory Size
32KB
Cpu Speed
200MHz
Digital Ic Case Style
QFP
No. Of Pins
240
Supply Voltage Range
1.1V To 1.3V
Operating Temperature Range
-20°C To +85°C
Svhc
No SVHC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
16.6
16.6.1
The SSU operation can be disabled or enabled using the standby control register. The initial
setting is for SSU operation to be halted. Access to registers is enabled by clearing module
standby mode. For details, refer to section 28, Power-Down Modes.
16.6.2
During continuous transmission or reception in SSU slave mode, negate (drive high level) the SCS
pin once per frame. Correct transmission and reception are not possible if the SCS pin is asserted
(low level) for more than one frame.
16.6.3
In the master transmission operation or the master transmission/reception operation of SSU mode,
please operate one of the following three ways.
(1) Write the next transmission data to the SSTDR after the TDRE bit of the SSSR is set to 1 and
(2) Write the next transmission data to the SSTDR after the TEND bit of the SSSR is set to 1.
(3) Set the SSCR2 as “TENDSTS = 0” or “TENDSTS = 1 and SCSATS = 1”.
before the transmission of one bit before the last bit starts.
Usage Note
Module Standby Mode Setting
Note on Continuous Transmission/Reception in SSU Slave Mode
Note in the Master Transmission Operation or the Master Transmission/Reception
Operation of SSU Mode
Section 16 Synchronous Serial Communication Unit (SSU)
Rev. 3.00 Sep. 28, 2009 Page 831 of 1650
REJ09B0313-0300

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