DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 145

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DS72030W200FPV

Manufacturer Part Number
DS72030W200FPV
Description
MPU, 32BIT, SH7203, ROMLESS, 240QFP
Manufacturer
Renesas Electronics America
Series
SH7200r
Datasheet

Specifications of DS72030W200FPV

Core Size
32bit
Program Memory Size
32KB
Cpu Speed
200MHz
Digital Ic Case Style
QFP
No. Of Pins
240
Supply Voltage Range
1.1V To 1.3V
Operating Temperature Range
-20°C To +85°C
Svhc
No SVHC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
4.4
The clock pulse generator has the following registers.
Table 4.4
4.4.1
FRQCR is a 16-bit readable/writable register used to specify whether a clock is output from the
CKIO pin during normal operation mode, release of bus mastership, software standby mode and
standby mode cancellation. The register also specifies the frequency-multiplier of the PLL circuit
and the frequency division ratio for the internal clock and peripheral clock (Pφ). FRQCR is
accessed by word.
Initial value:
Bit
15
Register Name
Frequency control register
R/W:
Bit:
Register Descriptions
Frequency Control Register (FRQCR)
Bit Name
15
R
0
-
Register Configuration
CKOEN2
R/W
14
0
R/W
13
CKOEN[1:0]
0
Initial
Value
0
R/W
12
0
Abbreviation R/W
FRQCR
11
R
0
-
R/W
R
10
R
0
-
R/W
Description
Reserved
This bit is always read as 0. The write value should
always be 0.
R/W
9
0
STC[1:0]
R/W
8
0
Initial Value Address
H'0003
R
7
0
-
Rev. 3.00 Sep. 28, 2009 Page 113 of 1650
R
6
0
-
Section 4 Clock Pulse Generator (CPG)
R
-
5
0
H'FFFE0010 16
R/W
IFC
4
0
R
3
0
-
REJ09B0313-0300
R/W
2
0
Access Size
PFC[2:0]
R/W
1
1
R/W
0
1

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