DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 310

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DS72030W200FPV

Manufacturer Part Number
DS72030W200FPV
Description
MPU, 32BIT, SH7203, ROMLESS, 240QFP
Manufacturer
Renesas Electronics America
Series
SH7200r
Datasheet

Specifications of DS72030W200FPV

Core Size
32bit
Program Memory Size
32KB
Cpu Speed
200MHz
Digital Ic Case Style
QFP
No. Of Pins
240
Supply Voltage Range
1.1V To 1.3V
Operating Temperature Range
-20°C To +85°C
Svhc
No SVHC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Section 9 Bus State Controller (BSC)
Rev. 3.00 Sep. 28, 2009 Page 278 of 1650
REJ09B0313-0300
Bit
4, 3
2
Bit Name
TRWL[1:0]*
Initial
Value
00
0
R/W
R
R/W
Description
Number of Auto-Precharge Startup Wait Cycles
Specify the number of minimum auto-precharge
startup wait cycles as shown below.
The setting for areas 2 and 3 is common.
00: No cycle
01: 1 cycle
10: 2 cycles
11: 3 cycles
Reserved
This bit is always read as 0. The write value should
always be 0.
Cycle number from the issuance of the WRITA
command by this LSI until the completion of auto-
precharge in the SDRAM.
Equivalent to the cycle number from the issuance
of the WRITA command until the issuance of the
ACTV command. Confirm that how many cycles
are required between the WRITE command receive
in the SDRAM and the auto-precharge activation,
referring to each SDRAM data sheet. And set the
cycle number so as not to exceed the cycle number
specified by this bit.
Cycle number from the issuance of the WRITA
command until the issuance of the PRE command.
This is the case when accessing another low
address in the same bank in bank active mode.

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