DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 1100

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DS72030W200FPV

Manufacturer Part Number
DS72030W200FPV
Description
MPU, 32BIT, SH7203, ROMLESS, 240QFP
Manufacturer
Renesas Electronics America
Series
SH7200r
Datasheet

Specifications of DS72030W200FPV

Core Size
32bit
Program Memory Size
32KB
Cpu Speed
200MHz
Digital Ic Case Style
QFP
No. Of Pins
240
Supply Voltage Range
1.1V To 1.3V
Operating Temperature Range
-20°C To +85°C
Svhc
No SVHC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Section 22 AND/NAND Flash Memory Controller (FLCTL)
22.3.5
FLADR2 is a 32-bit readable/writable register, and is valid when the ADRCNT2 bit in
FLCMDCR is set to 1. FLADR2 specifies an address to be output in command access mode.
Initial value:
Initial value:
Rev. 3.00 Sep. 28, 2009 Page 1068 of 1650
REJ09B0313-0300
Bit
31 to 8
7 to 0
R/W:
R/W:
Bit:
Bit:
Address Register 2 (FLADR2)
Bit Name
ADR5[7:0]
31
15
R
R
0
0
-
-
30
14
R
R
0
0
-
-
29
13
R
R
0
0
-
-
Initial
Value
All 0
All 0
28
12
R
R
0
0
-
-
27
11
R
R
0
0
-
-
R/W
R
R/W
26
10
R
R
0
0
-
-
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
Specify 5th data to be output to flash memory as an
address when ADRMD = 1.
Fifth Address Data
25
R
R
0
9
0
-
-
24
R
R
0
8
0
-
-
R/W
23
R
0
7
0
-
R/W
22
R
0
6
0
-
R/W
21
R
0
5
0
-
R/W
20
R
ADR5[7:0]
0
4
0
-
R/W
19
R
0
3
0
-
R/W
18
R
0
2
0
-
R/W
17
R
0
1
0
-
R/W
16
R
0
0
0
-

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