DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 1045

• Manufacturer Part Number: DS72030W200FPV
• Description: MPU, 32BIT, SH7203, ROMLESS, 240QFP
• Manufacturer: Renesas Electronics America
• Series: SH7200r

Specifications of DS72030W200FPV

• Core Size: 32bit
• Program Memory Size: 32KB
• Cpu Speed: 200MHz
• Digital Ic Case Style: QFP
• No. Of Pins: 240
• Supply Voltage Range: 1.1V To 1.3V
• Operating Temperature Range: -20°C To +85°C
• Svhc: No SVHC
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

19.5
Table 19.2 lists the RCAN-TL1 interrupt sources. These sources can be masked. Masking is
implemented using the mailbox interrupt mask registers (MBIMR) and interrupt mask register
(IMR). For details on the interrupt vector of each interrupt source, see section 6, Interrupt
Controller (INTC).
Table 19.2 RCAN-TL1-n*
Notes: 1. n = 0, 1
Interrupt Description
ERSn*
OVRn*
RMn0*
RMn1*
SLEn*
1
1
1
1
1
2. RM0 is an interrupt generated by the remote request pending flag for mailbox 0
3. IRR1 is a data frame received interrupt flag for mailboxes 0 to 31, and IRR2 is a remote
4. The DMAC is activated only by an RMn0 interrupt.
*
*
2
2
Interrupt Sources
,
(RFPR0[0]) or the data frame receive flag for mailbox 0 (RXPR0[0]). RM1 is an interrupt
generated by the remote request pending flag for mailbox n (RFPR0[n]) or the data
frame receive flag for mailbox n (RXPR0[n]) (n = 1 to 31).
frame request interrupt flag for mailboxes 0 to 31.
Error Passive Mode (TEC ≥ 128 or REC ≥ 128) IRR5
Bus Off (TEC ≥ 256)/Bus Off recovery
Error warning (TEC ≥ 96)
Error warning (REC ≥ 96)
Reset/halt/CAN sleep transition
Overload frame transmission
Unread message overwrite (overrun)
Start of new system matrix
TCMR2 compare match
Bus activity while in sleep mode
Timer overrun/Next_is_Gap reception/message
error
TCMR0 compare match
TCMR1 compare match
Data frame reception
Remote frame reception
Message transmission/transmission disabled
(slot empty)
1
Interrupt Sources
Section 19 Controller Area Network (RCAN-TL1)
Rev. 3.00 Sep. 28, 2009 Page 1013 of 1650
Interrupt Flag
IRR6
IRR3
IRR4
IRR0
IRR7
IRR9
IRR10
IRR11
IRR12
IRR13
IRR14
IRR15
IRR1*
IRR2*
IRR8
3
3
DMAC Activation
Not possible
Possible*
Not possible
REJ09B0313-0300
4