DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 1475

no-image

DS72030W200FPV

Manufacturer Part Number
DS72030W200FPV
Description
MPU, 32BIT, SH7203, ROMLESS, 240QFP
Manufacturer
Renesas Electronics America
Series
SH7200r
Datasheet

Specifications of DS72030W200FPV

Core Size
32bit
Program Memory Size
32KB
Cpu Speed
200MHz
Digital Ic Case Style
QFP
No. Of Pins
240
Supply Voltage Range
1.1V To 1.3V
Operating Temperature Range
-20°C To +85°C
Svhc
No SVHC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
(after execution of TDO change
29.4.4
An H-UDI reset is executed by setting an H-UDI reset assert command in SDIR. An H-UDI reset
is of the same kind as a power-on reset. An H-UDI reset is released by setting an H-UDI reset
negate command. The required time between the H-UDI reset assert command and H-UDI reset
negate command is the same as time for keeping the RES pin low to apply a power-on reset.
Chip internal reset
29.4.5
The H-UDI interrupt function generates an interrupt by setting a command from the H-UDI in
SDIR. An H-UDI interrupt is a general exception/interrupt operation, resulting in fetching the
exception service routine start address from the exception handling vector table, jumping to that
address, and starting program execution from that address. This interrupt request has a fixed
priority level of 15.
H-UDI interrupts are accepted in sleep mode, but not in software standby mode.
CPU state
timing switch command)
SDIR
H-UDI Reset
H-UDI Interrupt
(initial value)
H-UDI reset assert
TCK
TDO
TDO
Figure 29.3 H-UDI Data Transfer Timing
Figure 29.4 H-UDI Reset
t
H-UDI reset negate
TDOD
Section 29 User Debugging Interface (H-UDI)
Rev. 3.00 Sep. 28, 2009 Page 1443 of 1650
Fetch the initial values of PC and SR from
the exception handling vector table
t
TDOD
REJ09B0313-0300

Related parts for DS72030W200FPV