DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 690

• Manufacturer Part Number: DS72030W200FPV
• Description: MPU, 32BIT, SH7203, ROMLESS, 240QFP
• Manufacturer: Renesas Electronics America
• Series: SH7200r

Specifications of DS72030W200FPV

• Core Size: 32bit
• Program Memory Size: 32KB
• Cpu Speed: 200MHz
• Digital Ic Case Style: QFP
• No. Of Pins: 240
• Supply Voltage Range: 1.1V To 1.3V
• Operating Temperature Range: -20°C To +85°C
• Svhc: No SVHC
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Section 11 Multi-Function Timer Pulse Unit 2 (MTU2)
(26) Operation when Error Occurs during Reset-Synchronized PWM Mode Operation, and
Figure 11.138 shows an explanatory diagram of the case where an error occurs in reset-
synchronized PWM mode and operation is restarted in normal mode after re-setting.
1.
2.
3.
4.
5.
6.
7.
8.
9.
10. The count operation is stopped by TSTR. (MTU2 output becomes the reset-synchronized
11. Set normal mode. (MTU2 positive phase output is low, and negative phase output is high.)
12. Initialize the pins with TIOR.
13. Set MTU2 output with the PFC.
14. Operation is restarted by TSTR.
Rev. 3.00 Sep. 28, 2009 Page 658 of 1650
REJ09B0313-0300
MTU2 module output
After a reset, MTU2 output is low and ports are in the high-impedance state.
Select the reset-synchronized PWM output level and cyclic output enabling/disabling with
TOCR.
Set reset-synchronized PWM.
Enable channel 3 and 4 output with TOER.
Set MTU2 output with the PFC.
The count operation is started by TSTR.
The reset-synchronized PWM waveform is output on compare-match occurrence.
An error occurs.
Set port output with the PFC and output the inverse of the active level.
PWM output initial value.)
Operation is Restarted in Normal Mode
Port output
TIOC3D
TIOC3A
TIOC3B
Figure 11.138 Error Occurrence in Reset-Synchronized PWM Mode,
PE11
PE8
PE9
RESET
1
TOCR
2
(RPWM)
Hi-Z
Hi-Z
Hi-Z
TMDR
3
Recovery in Normal Mode
TOER
(1)
4
(MTU2)
PFC
5
TSTR
(1)
6
Match
7
occurs
Error
8
(PORT)
PFC
9
TSTR
(0)
10
(normal)
TMDR
11
0 out)
TIOR
(1 init
12
(MTU2)
PFC
13
TSTR
(1)
14