DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 1464

• Manufacturer Part Number: DS72030W200FPV
• Description: MPU, 32BIT, SH7203, ROMLESS, 240QFP
• Manufacturer: Renesas Electronics America
• Series: SH7200r

Specifications of DS72030W200FPV

• Core Size: 32bit
• Program Memory Size: 32KB
• Cpu Speed: 200MHz
• Digital Ic Case Style: QFP
• No. Of Pins: 240
• Supply Voltage Range: 1.1V To 1.3V
• Operating Temperature Range: -20°C To +85°C
• Svhc: No SVHC
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Section 28 Power-Down Modes
(3)
After canceling deep standby mode, the LSI can be activated through the external bus or from the
on-chip RAM (for data retention), which can be selected by setting the RAMBOOT bit in
DSCTR2. By setting the CS0KEEPE bit, the states of the external bus control pins can be retained
even after cancellation of deep standby mode. Table 28.3 shows the pin states after cancellation of
deep standby mode according to the setting of each bit. Table 28.4 lists the external bus control
pins.
Table 28.3 Pin States after Cancellation of Deep Standby Mode and System Activation
Table 28.4 External Bus Control Pins in Different Modes
Rev. 3.00 Sep. 28, 2009 Page 1432 of 1650
REJ09B0313-0300
CS0KEEPE
Bit
0
0
1
1
Operating Mode 0
(Activation through external 16-bit bus)
A[20:0]
D[15:0]
CS0, RD, CKIO
Operation after Canceling Deep Standby Mode
Method by the DSCTR2 Settings
RAMBOOT
Bit
0
1
0
1
Activation
Method
External bus
On-chip RAM
(for data
retention)
⎯
On-chip RAM
(for data
retention)
Pin States After Cancellation of Deep Standby
Mode
The states of the external bus control pins are not retained.
For other pins, the retention of their states is cancelled
when the IOKEEP bit is cleared.
The states of the external bus control pins are not retained.
After cancellation of deep standby mode, the retention of
the external bus control pin states is cancelled.
For other pins, the retention of their states is cancelled
when the IOKEEP bit is cleared.
Setting prohibited.
The states of the external bus control pin are retained.
The retention of the states of the external bus control pins
and other pins is cancelled when the IOKEEP bit is cleared.
Operating Mode 1
(Activation through external 32-bit bus)
A[20:2]
D[31:0]
CS0, RD, CKIO