DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 1146

• Manufacturer Part Number: DS72030W200FPV
• Description: MPU, 32BIT, SH7203, ROMLESS, 240QFP
• Manufacturer: Renesas Electronics America
• Series: SH7200r

Specifications of DS72030W200FPV

• Core Size: 32bit
• Program Memory Size: 32KB
• Cpu Speed: 200MHz
• Digital Ic Case Style: QFP
• No. Of Pins: 240
• Supply Voltage Range: 1.1V To 1.3V
• Operating Temperature Range: -20°C To +85°C
• Svhc: No SVHC
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Section 23 USB 2.0 Host/Function Module (USB)
Note: The TEND bit is available only in D0FBCFG and D1FBCFG.
Rev. 3.00 Sep. 28, 2009 Page 1114 of 1650
REJ09B0313-0300
Bit
8
7 to 4
3 to 0
Bit Name
FEND
⎯
FWAIT[3:0]
Initial
Value
0
All 0
All 1
R/W
R/W
R
R/W
Description
FIFO Port Endian
Specifies the byte endian for use in access to the
FIFO port. Tables 23.5 to 23.7 show endian
operation. This LSI operates in big endian. Set this
bit to transmit or receive data with different endians.
Reserved
These bits are always read as 0. The write value
should always be 0.
FIFO Port Access Wait Specification
These bits specify the number of access waits for the
corresponding FIFO port. The minimum number of
FIFO port access cycles is two.
0000: 0 wait (two access cycles)
0010: 2 waits (four access cycles)
0100: 4 waits (six access cycles)
1111: 15 waits (seventeen access cycles)
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