DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 136

• Manufacturer Part Number: DS72030W200FPV
• Description: MPU, 32BIT, SH7203, ROMLESS, 240QFP
• Manufacturer: Renesas Electronics America
• Series: SH7200r

Specifications of DS72030W200FPV

• Core Size: 32bit
• Program Memory Size: 32KB
• Cpu Speed: 200MHz
• Digital Ic Case Style: QFP
• No. Of Pins: 240
• Supply Voltage Range: 1.1V To 1.3V
• Operating Temperature Range: -20°C To +85°C
• Svhc: No SVHC
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Section 3 Floating-Point Unit (FPU)
The possibilities for exception handling caused by floating point operations are described in the
individual instruction descriptions. All exception events that originate in floating point operations
are assigned as the same FPU exception handling event. The meaning of an exception caused by a
floating point operation is determined by software by reading from FPSCR and interpreting the
information it contains. Also, the destination register is not changed when FPU exception handling
occurs.
Except for the above, the bit corresponding to source V, Z, O, U, or I is set to 1, and a default
value is generated as the operation result.
• Invalid operation (V): qNaN is generated as the result.
• Division by zero (Z): Infinity with the same sign as the unrounded value is generated.
• Overflow (O):
• Underflow (U):
• Inexact exception (I): An inexact result is generated.
Rev. 3.00 Sep. 28, 2009 Page 104 of 1650
REJ09B0313-0300
When rounding mode = RZ, the maximum normalized number, with the same sign as the
unrounded value, is generated.
When rounding mode = RN, infinity with the same sign as the unrounded value is generated.
Zero with the same sign as the unrounded value is generated.