DK-DEV-4SGX230N Altera, DK-DEV-4SGX230N Datasheet - Page 1052

• Manufacturer Part Number: DK-DEV-4SGX230N
• Description: KIT DEVELOPMENT STRATIX IV
• Manufacturer: Altera
• Series: Stratix® IVr
• Type: FPGAr

Specifications of DK-DEV-4SGX230N

• Contents: Development Board, Universal Power Supply, Cables and Software
• Silicon Manufacturer: Altera
• Core Architecture: FPGA
• Core Sub-architecture: Stratix
• Silicon Core Number: EP4S
• Silicon Family Name: Stratix IV GX
• Rohs Compliant: Yes
• For Use With/related Products: EP4SGX230K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-2594

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Stratix IV Device Handbook Volume 3
Create Reset Logic to Control the FPGA Fabric and Transceivers
The design requires independent control on each channel. Altera recommends
creating independent reset control logic for each channel.
In this design, channel 0 and channel 2 share the same CMU PLL (because they are
configured at the same data rate) and channel 1 uses the second CMU PLL. When you
create a Transmitter Only or Receiver and Transmitter instance, the ALTGX
MegaWizard Plug-In Manager provides a pll_powerdown signal to reset the
CMU PLL that provides clocks to the transmitter channel. In this design example,
because channels 0 and 2 share the same CMU PLL, drive the pll_powerdown port of
channel 0 and channel 2 in the ALTGX instance from the same logic.
Chapter 2: Transceiver Design Flow Guide for Stratix IV Devices
Example 1: Fibre Channel Protocol Application
February 2011 Altera Corporation