DK-DEV-4SGX230N Altera, DK-DEV-4SGX230N Datasheet - Page 846

• Manufacturer Part Number: DK-DEV-4SGX230N
• Description: KIT DEVELOPMENT STRATIX IV
• Manufacturer: Altera
• Series: Stratix® IVr
• Type: FPGAr

Specifications of DK-DEV-4SGX230N

• Contents: Development Board, Universal Power Supply, Cables and Software
• Silicon Manufacturer: Altera
• Core Architecture: FPGA
• Core Sub-architecture: Stratix
• Silicon Core Number: EP4S
• Silicon Family Name: Stratix IV GX
• Rohs Compliant: Yes
• For Use With/related Products: EP4SGX230K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-2594

4–40
Document Revision History
Table 4–10. Document Revision History
Stratix IV Device Handbook Volume 2: Transceivers
February 2010
November 2009
June 2009
March 2009
November 2008
Date
Version
Table 4–9. Reference Information (Part 2 of 2)
Table 4–10
4.0
4.1
3.1
3.0
2.0
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■
■
■
■
■
■
■
■
■
■
■
■
■
■
Added:
■
■
Added chapter to the Stratix IV Device Handbook.
Terms Used in this Chapter
Updated the
Mode”,
“Receiver and Transmitter Channel—Receiver CDR in Automatic Lock
and Transmitter Channel—Receiver CDR in Manual Lock
Transmitter Channel—Receiver CDR in Automatic Lock
Channel—Receiver CDR in Manual Lock
Set-up—Receiver CDR in Automatic Lock
Set-up—Receiver CDR in Manual Lock Mode”
Updated
Figure
Updated
Updated chapter title.
Applied new template.
Minor text edits.
Updated all figures (except Figure 1, Figure 2, and Figure 14) and all sections so they use
the same terms that are found in the DC and Switching Characteristics chapter in the
Stratix IV Device Datasheet section.
Added Table 4–1, Table 4–2, Table 4–5, Table 4–6, Table 4–7, and Table 4–8.
Added the “Reference Information” section.
Updated all figures (except Figure 1).
Changed “PLL_powerdown” to “pll_powerdown” throughout.
Minor text edits.
Added new “Transmitter Only Channel with a PLL_L/R” section.
Updated the “Transmitter Only Channel with no PLL_L/R” and “Transmitter Only Channel”
sections.
Minor text edits.
“PMA Direct Drive Mode Reset Sequences”
“Dynamic Reconfiguration Reset Sequences”
lists the revision history for this chapter.
tx_digitalreset
rx_pll_locked
4–18, and
“Receiver and Transmitter Channel—Receiver CDR in Manual Lock
Figure
Table
“Receiver and Transmitter Channel—Receiver CDR in Automatic Lock
4–2.
4–4,
Figure
Figure
4–19.
4–5,
Figure
Chapter 4: Reset Control and Power Down in Stratix IV Devices
Changes
4–6,
Mode”,
Mode”,
Figure
“Receiver and Transmitter Channel
“Receiver and Transmitter Channel
Useful Reference Points
4–7,
Mode”,
Figure
Mode”,
page 4–3
page 4–2
February 2011 Altera Corporation
“Receiver and Transmitter
4–16,
“Receiver and
Document Revision History
Figure
Mode”,
Mode”,
4–17,
“Receiver