DK-DEV-4SGX230N Altera, DK-DEV-4SGX230N Datasheet - Page 487

• Manufacturer Part Number: DK-DEV-4SGX230N
• Description: KIT DEVELOPMENT STRATIX IV
• Manufacturer: Altera
• Series: Stratix® IVr
• Type: FPGAr

Specifications of DK-DEV-4SGX230N

• Contents: Development Board, Universal Power Supply, Cables and Software
• Silicon Manufacturer: Altera
• Core Architecture: FPGA
• Core Sub-architecture: Stratix
• Silicon Core Number: EP4S
• Silicon Family Name: Stratix IV GX
• Rohs Compliant: Yes
• For Use With/related Products: EP4SGX230K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-2594

Chapter 1: Transceiver Architecture in Stratix IV Devices
Transceiver Block Architecture
February 2011 Altera Corporation
In an AC-coupled link, the AC coupling capacitor blocks the transmitter DC V
on-chip or off-chip receiver termination and biasing circuitry automatically restores
the selected V
Figure 1–37. AC-Coupled Link
Note to
(1) The receiver termination and biasing can be on-chip or off-chip.
The following protocols supported by Stratix IV GX and GT devices mandate
AC-coupled links:
■
■
■
■
■
PCIe
Gigabit Ethernet
Serial RapidIO
XAUI
SDI
Figure
AC-Coupled Links
Transmitter
1–37:
TX Termination
CM
.
Figure 1–37
TX
V
CM
shows an AC-coupled link.
Physical Medium
Physical Medium
AC Coupling
Capacitor
AC Coupling
Capacitor
Stratix IV Device Handbook Volume 2: Transceivers
RX
V
CM
RX Termination
Receiver
CM
. The
1–43