DK-DEV-4SGX230N Altera, DK-DEV-4SGX230N Datasheet - Page 337

• Manufacturer Part Number: DK-DEV-4SGX230N
• Description: KIT DEVELOPMENT STRATIX IV
• Manufacturer: Altera
• Series: Stratix® IVr
• Type: FPGAr

Specifications of DK-DEV-4SGX230N

• Contents: Development Board, Universal Power Supply, Cables and Software
• Silicon Manufacturer: Altera
• Core Architecture: FPGA
• Core Sub-architecture: Stratix
• Silicon Core Number: EP4S
• Silicon Family Name: Stratix IV GX
• Rohs Compliant: Yes
• For Use With/related Products: EP4SGX230K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-2594

Chapter 10: Configuration, Design Security, and Remote System Upgrades in Stratix IV Devices
Configuration Schemes
Table 10–1. Configuration Schemes for Stratix IV Devices (Part 2 of 2)
April 2011 Altera Corporation
JTAG-based configuration
Notes to
(1) Stratix IV devices only support fast AS configuration. You must use either EPCS64 or EPCS128 devices to configure a Stratix IV device in fast
(2) These modes are only supported when using a MAX II device or a microprocessor with flash memory for configuration. In these modes, the
(3) Do not leave the MSEL pins floating, connect them to V
(4) The JTAG-based configuration takes precedence over other configuration schemes, which means the MSEL pin settings are ignored. The
AS mode.
host system must output a DCLK that is ×4 the data rate.
production. If you only use the JTAG configuration, connect the MSEL pins to GND.
JTAG-based configuration does not support the design security or decompression features.
Table
10–1:
Configuration Scheme
Table 10–2
Stratix IV devices.
Table 10–2. Uncompressed Raw Binary File (.rbf) Sizes for Stratix IV Devices
Use the data in
configuration file formats; for example, a hexidecimal (.hex) or tabular text file (.ttf)
format, have different file sizes. Refer to the Quartus
types of configuration file and file sizes. However, for any specific version of the
Quartus II software, any design targeted for the same device has the same
uncompressed configuration file size. If you are using compression, the file size can
vary after each compilation because the compression ratio depends on the design.
EP4SE230
EP4SE360
EP4SE530
EP4SE820
EP4SGX70
EP4SGX110
EP4SGX180
EP4SGX230
EP4SGX290
EP4SGX360
EP4SGX530
EP4S40G2
EP4S40G5
EP4S100G2
EP4S100G3
EP4S100G4
EP4S100G5
Note to
(1) This only applies to the F45 package.
(4)
Table
Device
lists the uncompressed raw binary file (.rbf) configuration file sizes for
10–2:
Table 10–2
CCPGM
to estimate the file size before design compilation. Different
or GND. These pins support the non-JTAG configuration scheme used in
MSEL2
171,722,057
171,722,057
Data Size (Bits)
(3)
128,395,577
171,722,057
241,684,465
128,395,577
128,395,577
171,722,057
171,722,057
171,722,057
171,722,057
171,722,057
94,557,465
47,833,345
47,833,345
94,557,465
94,557,465
94,557,465
94,557,465
®
II software for the different
(1)
(1)
Stratix IV Device Handbook Volume 1
MSEL1
(3)
MSEL0
(3)
10–3