DK-DEV-4SGX230N Altera, DK-DEV-4SGX230N Datasheet - Page 47

KIT DEVELOPMENT STRATIX IV

DK-DEV-4SGX230N

Manufacturer Part Number
DK-DEV-4SGX230N
Description
KIT DEVELOPMENT STRATIX IV
Manufacturer
Altera
Series
Stratix® IVr
Type
FPGAr

Specifications of DK-DEV-4SGX230N

Contents
Development Board, Universal Power Supply, Cables and Software
Silicon Manufacturer
Altera
Core Architecture
FPGA
Core Sub-architecture
Stratix
Silicon Core Number
EP4S
Silicon Family Name
Stratix IV GX
Rohs Compliant
Yes
For Use With/related Products
EP4SGX230K
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
544-2594

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DK-DEV-4SGX230N
Manufacturer:
Altera
Quantity:
135
Part Number:
DK-DEV-4SGX230N
Manufacturer:
ALTERA
0
Chapter 2: Logic Array Blocks and Adaptive Logic Modules in Stratix IV Devices
Adaptive Logic Modules
Figure 2–9. Template for Supported Seven-Input Functions in Extended LUT Mode
Note to
(1) If the seven-input function is unregistered, the unused eighth input is available for register packing. The second register, reg1, is
February 2011 Altera Corporation
not available.
Figure
2–9:
datae0
datae1
dataf0
dataf1
dataa
datab
datad
datac
(1)
Extended LUT Mode
Use extended LUT mode to implement a specific set of seven-input functions. The set
must be a 2-to-1 multiplexer fed by two arbitrary five-input functions sharing four
inputs.
extended LUT mode. In this mode, if the seven-input function is unregistered, the
unused eighth input is available for register packing.
Functions that fit into the template shown in
These functions often appear in designs as “if-else” statements in Verilog HDL or
VHDL code.
This input is available
for register packing.
Figure 2–9
5-Input
5-Input
LUT
LUT
shows the template of supported seven-input functions using
combout0
D
Figure 2–9
reg0
Q
occur naturally in designs.
To general or
To general or
local routing
local routing
Stratix IV Device Handbook Volume 1
2–11

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