DK-DEV-4SGX230N Altera, DK-DEV-4SGX230N Datasheet - Page 513

KIT DEVELOPMENT STRATIX IV

DK-DEV-4SGX230N

Manufacturer Part Number
DK-DEV-4SGX230N
Description
KIT DEVELOPMENT STRATIX IV
Manufacturer
Altera
Series
Stratix® IVr
Type
FPGAr

Specifications of DK-DEV-4SGX230N

Contents
Development Board, Universal Power Supply, Cables and Software
Silicon Manufacturer
Altera
Core Architecture
FPGA
Core Sub-architecture
Stratix
Silicon Core Number
EP4S
Silicon Family Name
Stratix IV GX
Rohs Compliant
Yes
For Use With/related Products
EP4SGX230K
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
544-2594

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DK-DEV-4SGX230N
Manufacturer:
Altera
Quantity:
135
Part Number:
DK-DEV-4SGX230N
Manufacturer:
ALTERA
0
Chapter 1: Transceiver Architecture in Stratix IV Devices
Transceiver Block Architecture
Table 1–31. Word Aligner Options Available in Basic Single-Width and Double-Width Modes
February 2011 Altera Corporation
Basic
Single-Width
Functional
Mode
PMA-PCS
Interface
Width
10-bit
8-bit
Table 1–31
double-width modes.
Word Alignment
Synchronization
State Machine
Alignment
Alignment
Automatic
Manual
Bit-Slip
Manual
Bit-Slip
Mode
lists the word aligner options available in Basic single-width and
7- and 10-bit
7- and 10-bit
7- and 10-bit
Alignment
Pattern
Length
16-bit
16-bit
Word
rx_enapatternalign
Level Sensitive
Rising Edge
Sensitivity
Sensitive
N/A
N/A
N/A
Stratix IV Device Handbook Volume 2: Transceivers
Asserted high for
one parallel clock
cycle when the
word aligner
aligns to a new
word boundary.
Asserted high for
one parallel clock
cycle when the
word aligner
aligns to a new
word boundary.
Stays high as
long as the
synchronization
conditions are
satisfied.
rx_syncstatus
Behavior
N/A
N/A
(Note 1)
(Part 1 of 2)
Asserted high for
one parallel clock
cycle when the
word alignment
pattern appears in
the current word
boundary.
Asserted high for
one parallel clock
cycle when the
word alignment
pattern appears in
the current word
boundary.
Asserted high for
one parallel clock
cycle when the
word alignment
pattern appears in
the current word
boundary.
Asserted high for
one parallel clock
cycle when the
word alignment
pattern appears in
the current word
boundary.
Asserted high for
one parallel clock
cycle when the
word alignment
pattern appears in
the current word
boundary.
rx_patterndetect
Behavior
1–69

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