DK-DEV-4SGX230N Altera, DK-DEV-4SGX230N Datasheet - Page 807

• Manufacturer Part Number: DK-DEV-4SGX230N
• Description: KIT DEVELOPMENT STRATIX IV
• Manufacturer: Altera
• Series: Stratix® IVr
• Type: FPGAr

Specifications of DK-DEV-4SGX230N

• Contents: Development Board, Universal Power Supply, Cables and Software
• Silicon Manufacturer: Altera
• Core Architecture: FPGA
• Core Sub-architecture: Stratix
• Silicon Core Number: EP4S
• Silicon Family Name: Stratix IV GX
• Rohs Compliant: Yes
• For Use With/related Products: EP4SGX230K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-2594

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SIV52004-4.1
Stratix IV Device Handbook Volume 2: Transceivers
February 2011
February 2011
SIV52004-4.1
Stratix
clock multiplier unit (CMU) phase-locked loops (PLLs) independently. The ALTGX
Transceiver MegaWizard
each channel instantiated in your design. It also provides one power-down signal for
each transceiver block.
This chapter includes the following sections:
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Figure 4–1
Figure 4–1. Reset Control and Power-Down Block
“User Reset and Power-Down Signals” on page 4–2
“Transceiver Reset Sequences” on page 4–4
“PMA Direct Drive Mode Reset Sequences” on page 4–24
“Dynamic Reconfiguration Reset Sequences” on page 4–36
“Power Down” on page 4–38
“Simulation Requirements” on page 4–39
“Reference Information” on page 4–39
®
IV devices offer multiple reset signals to control the transceiver channels and
shows the reset control and power-down block for a Stratix IV device.
gxb_powerdown
rx_analogreset
pll_powerdown
tx_digitalreset
rx_digitalreset
™
Plug-In Manager provides individual reset signals for
4. Reset Control and Power Down in
Reset Controller
Stratix IV Devices
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