DK-DEV-4SGX230N Altera, DK-DEV-4SGX230N Datasheet - Page 1125
![KIT DEVELOPMENT STRATIX IV](/photos/28/41/284156/dk-dev-4sgx230n_sml.jpg)
DK-DEV-4SGX230N
Manufacturer Part Number
DK-DEV-4SGX230N
Description
KIT DEVELOPMENT STRATIX IV
Manufacturer
Altera
Series
Stratix® IVr
Type
FPGAr
Datasheets
1.EP4SGX110DF29C3N.pdf
(80 pages)
2.EP4SGX110DF29C3N.pdf
(1154 pages)
3.DK-DEV-4SGX230N.pdf
(2 pages)
4.DK-DEV-4SGX530N.pdf
(57 pages)
Specifications of DK-DEV-4SGX230N
Contents
Development Board, Universal Power Supply, Cables and Software
Silicon Manufacturer
Altera
Core Architecture
FPGA
Core Sub-architecture
Stratix
Silicon Core Number
EP4S
Silicon Family Name
Stratix IV GX
Rohs Compliant
Yes
For Use With/related Products
EP4SGX230K
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
544-2594
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DK-DEV-4SGX230N
Manufacturer:
Altera
Quantity:
135
- EP4SGX110DF29C3N PDF datasheet
- EP4SGX110DF29C3N PDF datasheet #2
- DK-DEV-4SGX230N PDF datasheet #3
- DK-DEV-4SGX530N PDF datasheet #4
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Chapter 1: DC and Switching Characteristics for Stratix IV Devices
Switching Characteristics
Table 1–31. Transceiver Jitter Specifications for Protocols by Stratix IV GT Devices (Part 2 of 2)
Table 1–32. SFI-S Transmitter Jitter Specifications for Stratix IV GT Devices
April 2011 Altera Corporation
OTL 4.10 (1),
Total Jitter at
11.18 Gbps
Deterministic
Jitter
Sinusoidal Jitter
tolerance
Notes to
(1) The jitter numbers for XLAUI/CAUI are compliant to the IEEE P802.3ba specification.
(2) Stratix IV GT transceivers are compliant to the XFI datacom transmitter jitter specifications in Table 9 of XFP Revision 4.1.
(3) Contact Altera for board and link best practices at BER = 1E-15.
Total Transmitter jitter at
11.3 Gbps
Notes to
(1) Dedicated refclk pins were used to drive the input reference clocks.
(2) The jitter numbers are valid for stated conditions only.
(3) Two hundred channels were characterized to derive the mean transmitter jitter specification of 0.23 UI. The maximum jitter across the 200 units
(4) Contact Altera for board and link best practices at BER = 1E-15.
Symbol/Description
Description
characterized was 0.30 UI.
Symbol/
Table
Table
(4)
1–31:
1–32:
(3)
Pattern = PRBS-
31
V
REFCLK =
698.75 MHz
Jitter Frequency
= 40 KHz
Pattern = PRBS-
31
Equalization =
Disabled
BER = 1E-12
Jitter Frequency
≥ 4 MHz
Pattern = PRBS-
31
Equalization =
Disabled
BER = 1E-12
OD
Table 1–32
Conditions
= 800 mV
Pattern = PRBS-31
Vod = 800 mV
REFCLK = 706.25 MHz
12 channels in Basic ×1 mode
lists the SFI-S transmitter jitter specifications for Stratix IV GT devices.
Conditions
-1 Industrial Speed Grad
Min
—
—
> 0.05
Typ
> 5
—
—
Max
0.30
0.17
-1 Industrial
Speed Grade
Stratix IV Device Handbook Volume 4: Device Datasheet and Addendum
0.23 UI
Mean
-2 Industrial Speed Grade -3 Industrial Speed Grade
Min
—
—
(3)
> 0.05
Typ
> 5
—
—
(Note
Speed Grade
-2 Industrial
Mean
1),
—
Max
0.30
0.17
(2)
Min
—
—
Speed Grade
-3 Industrial
Mean
—
Typ
—
—
—
—
0.30
0.17
Max
Unit
UI
1–43
Unit
UI
UI
UI
UI
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