DK-DEV-4SGX230N Altera, DK-DEV-4SGX230N Datasheet - Page 1089
![KIT DEVELOPMENT STRATIX IV](/photos/28/41/284156/dk-dev-4sgx230n_sml.jpg)
DK-DEV-4SGX230N
Manufacturer Part Number
DK-DEV-4SGX230N
Description
KIT DEVELOPMENT STRATIX IV
Manufacturer
Altera
Series
Stratix® IVr
Type
FPGAr
Datasheets
1.EP4SGX110DF29C3N.pdf
(80 pages)
2.EP4SGX110DF29C3N.pdf
(1154 pages)
3.DK-DEV-4SGX230N.pdf
(2 pages)
4.DK-DEV-4SGX530N.pdf
(57 pages)
Specifications of DK-DEV-4SGX230N
Contents
Development Board, Universal Power Supply, Cables and Software
Silicon Manufacturer
Altera
Core Architecture
FPGA
Core Sub-architecture
Stratix
Silicon Core Number
EP4S
Silicon Family Name
Stratix IV GX
Rohs Compliant
Yes
For Use With/related Products
EP4SGX230K
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
544-2594
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DK-DEV-4SGX230N
Manufacturer:
Altera
Quantity:
135
- EP4SGX110DF29C3N PDF datasheet
- EP4SGX110DF29C3N PDF datasheet #2
- DK-DEV-4SGX230N PDF datasheet #3
- DK-DEV-4SGX530N PDF datasheet #4
- Current page: 1089 of 1154
- Download datasheet (32Mb)
Chapter 1: DC and Switching Characteristics for Stratix IV Devices
Electrical Characteristics
Table 1–9. Bus Hold Parameters (Part 2 of 2)
Table 1–10. OCT Calibration Accuracy Specifications for Stratix IV Devices
April 2011 Altera Corporation
Parameter Symbol
Low
overdrive
current
High
overdrive
current
Bus-hold
trip point
25-Ω R
3.0, 2.5, 1.8, 1.5, 1.2
50-Ω R
3.0, 2.5, 1.8, 1.5, 1.2
50-Ω R
2.5, 1.8, 1.5, 1.2
20-Ω, 40-Ω, and
60-Ω R
3.0, 2.5, 1.8, 1.5, 1.2
25-Ω R
3.0, 2.5, 1.8, 1.5, 1.2
Notes to
(1) OCT calibration accuracy is valid at the time of calibration only.
(2) 25-
(3) 20-
Symbol
Ω
Ω
S
S
T
S
S_left_shift
Table
(3)
R
R
(2)
S
S
is not supported for 1.5 V and 1.2 V in Row I/O.
is not supported for 1.5 V and 1.2 V in Row I/O.
1–10:
V
I
I
ODH
ODL
TRIP
On-Chip Termination (OCT) Specifications
If you enable OCT calibration, calibration is automatically performed at power-up for
I/Os connected to the calibration block.
termination calibration accuracy specifications.
Internal series termination
with calibration (25-Ω
setting)
Internal series termination
with calibration (50-Ω
setting)
Internal parallel termination
with calibration (50-Ω
setting)
Expanded range for internal
series termination with
calibration (20-Ω, 40-Ω , and
60-Ω R
Internal left shift series
termination with calibration
(25-Ω R
Conditions
0V < V
0V < V
V
V
—
CCIO
CCIO
S
S_left_shift
IN
IN
Description
setting)
<
<
setting)
0.45
Min
—
—
1.2 V
-120
Max
0.95
120
V
V
V
V
V
CCIO
CCIO
CCIO
CCIO
CCIO
0.50
Min
—
—
Conditions
1.5, 1.2 V
1.5, 1.2 V
1.5, 1.2 V
1.5, 1.2 V
1.5 V
= 3.0, 2.5, 1.8,
= 3.0, 2.5, 1.8,
= 2.5, 1.8, 1.5,
= 3.0, 2.5, 1.8,
= 3.0, 2.5, 1.8,
Stratix IV Device Handbook Volume 4: Device Datasheet and Addendum
1.2 V
-160
Max
1.00
160
Table 1–10
0.68
Min
—
—
1.8 V
V
(Note 1)
CCIO
± 10
± 10
± 10
lists the Stratix IV OCT
Max
-200
1.07
± 8
± 8
C2
200
Calibration Accuracy
0.70
Min
—
—
C3,I3
2.5 V
± 10
± 10
± 10
± 8
± 8
-300
Max
1.70
300
C4,I4
± 10
± 10
± 10
0.80
± 8
± 8
Min
—
—
3.0 V
-500
2.00
Max
500
Unit
%
%
%
%
%
1–7
Unit
µA
µA
V
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