DK-DEV-4SGX230N Altera, DK-DEV-4SGX230N Datasheet - Page 946
![KIT DEVELOPMENT STRATIX IV](/photos/28/41/284156/dk-dev-4sgx230n_sml.jpg)
DK-DEV-4SGX230N
Manufacturer Part Number
DK-DEV-4SGX230N
Description
KIT DEVELOPMENT STRATIX IV
Manufacturer
Altera
Series
Stratix® IVr
Type
FPGAr
Datasheets
1.EP4SGX110DF29C3N.pdf
(80 pages)
2.EP4SGX110DF29C3N.pdf
(1154 pages)
3.DK-DEV-4SGX230N.pdf
(2 pages)
4.DK-DEV-4SGX530N.pdf
(57 pages)
Specifications of DK-DEV-4SGX230N
Contents
Development Board, Universal Power Supply, Cables and Software
Silicon Manufacturer
Altera
Core Architecture
FPGA
Core Sub-architecture
Stratix
Silicon Core Number
EP4S
Silicon Family Name
Stratix IV GX
Rohs Compliant
Yes
For Use With/related Products
EP4SGX230K
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
544-2594
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DK-DEV-4SGX230N
Manufacturer:
Altera
Quantity:
135
- EP4SGX110DF29C3N PDF datasheet
- EP4SGX110DF29C3N PDF datasheet #2
- DK-DEV-4SGX230N PDF datasheet #3
- DK-DEV-4SGX530N PDF datasheet #4
- Current page: 946 of 1154
- Download datasheet (32Mb)
5–100
Stratix IV Device Handbook Volume 2: Transceivers
Different Dynamic Reconfiguration Modes Involved
1. Channel and CMU PLL reconfiguration mode—used for reconfiguring four
2. Central control unit reconfiguration mode—used for reconfiguring central control
For more information, refer to
on page
.mif Generation
The following .mifs are required for this example:
■
■
For more information, refer to
Various Dynamic Reconfiguration Transactions
The following dynamic reconfiguration transactions are required for this example:
■
■
regular transceiver channels and the CMU0 PLL (in GXBR0) from XAUI mode to
PCIe ×4 mode and vice versa.
1
unit logic used in bonded modes from XAUI mode to PCIe ×4 mode.
One .mif is required to move from XAUI mode to PCIe ×4 mode
Another .mif is required to revert back to XAUI mode from PCIe ×4 mode
.mif write transaction—for more information, refer to
Reconfiguration Mode Details” on page
Alternatively, you may use reduced .mif reconfiguration. Reduced .mifs are
generated using the altgx_diffmifgen.exe command. For more information, refer
to
“Reduced .mif Reconfiguration” on page
5–19.
Use this mode instead of channel reconfiguration with transmitter PLL
select mode because the central clock divider used for bonded modes is
only available in CMU0; therefore, you cannot use the CMU1 PLL as an
alternate TX PLL.
“Transceiver Channel Reconfiguration Mode Details”
“Memory Initialization File (.mif)” on page
Chapter 5: Dynamic Reconfiguration in Stratix IV Devices
5–24.
5–24.
“Channel and CMU PLL
Dynamic Reconfiguration Examples
February 2011 Altera Corporation
5–20.
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