DK-DEV-4SGX230N Altera, DK-DEV-4SGX230N Datasheet - Page 512
![KIT DEVELOPMENT STRATIX IV](/photos/28/41/284156/dk-dev-4sgx230n_sml.jpg)
DK-DEV-4SGX230N
Manufacturer Part Number
DK-DEV-4SGX230N
Description
KIT DEVELOPMENT STRATIX IV
Manufacturer
Altera
Series
Stratix® IVr
Type
FPGAr
Datasheets
1.EP4SGX110DF29C3N.pdf
(80 pages)
2.EP4SGX110DF29C3N.pdf
(1154 pages)
3.DK-DEV-4SGX230N.pdf
(2 pages)
4.DK-DEV-4SGX530N.pdf
(57 pages)
Specifications of DK-DEV-4SGX230N
Contents
Development Board, Universal Power Supply, Cables and Software
Silicon Manufacturer
Altera
Core Architecture
FPGA
Core Sub-architecture
Stratix
Silicon Core Number
EP4S
Silicon Family Name
Stratix IV GX
Rohs Compliant
Yes
For Use With/related Products
EP4SGX230K
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
544-2594
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DK-DEV-4SGX230N
Manufacturer:
Altera
Quantity:
135
- EP4SGX110DF29C3N PDF datasheet
- EP4SGX110DF29C3N PDF datasheet #2
- DK-DEV-4SGX230N PDF datasheet #3
- DK-DEV-4SGX530N PDF datasheet #4
- Current page: 512 of 1154
- Download datasheet (32Mb)
1–68
Stratix IV Device Handbook Volume 2: Transceivers
In some Basic double-width configurations with 16-bit PMA-PCS interface, you can
configure the word aligner in bit-slip mode by selecting the Use manual bit slipping
mode option in the ALTGX MegaWizard Plug-In Manager.
The word aligner operation for Basic double-width with 16-bit PMA-PCS interface is
similar to the word aligner operation in Basic single-width mode with 8-bit PMA-PCS
interface. For word aligner operation in bit-slip mode, refer to
Single-Width Mode with 8-Bit PMA-PCS Interface Modes” on page
difference is that the bit-slip word aligner in 16-bit PMA-PCS interface modes allows
8-bit and 16-bit word alignment patterns, whereas the bit-slip word aligner in 8-bit
PMA-PCS interface modes allows only a 16-bit word alignment pattern.
A 20-bit PMA-PCS interface is supported only in Basic double-width mode.
Table 1–30
20-bit PMA-PCS interface.
Table 1–30. Word Aligner in 20-Bit PMA-PCS Interface Modes
The word aligner operation in Basic double-width mode with 20-bit PMA-PCS
interface is similar to the word aligner operation in Basic double-width mode with a
16-bit PMA-PCS interface. For word aligner operation in manual alignment mode,
refer to
Modes” on page
aligner in 20-bit PMA-PCS interface modes allows 7-, 10-, and 20-bit word alignment
patterns, whereas the manual alignment mode word aligner in 16-bit PMA-PCS
interface modes allows only 8-, 16-, and 32-bit word alignment patterns.
In some Basic single-width configurations with 20-bit PMA-PCS interface, you can
configure the word aligner in bit-slip mode by selecting the Use manual bit slipping
mode option in the ALTGX MegaWizard Plug-In Manager.
The word aligner operation for Basic double-width with 20-bit PMA-PCS interface is
similar to the word aligner operation in Basic single-width mode with an 8-bit
PMA-PCS interface. For word aligner operation in bit-slip mode, refer to
Aligner in Single-Width Mode with 8-Bit PMA-PCS Interface Modes” on page
The difference is that the bit-slip word aligner in 20-bit PMA-PCS interface modes
allows only 7-, 10-, and 20-bit word alignment patterns, whereas the bit-slip word
aligner in 8-bit PMA-PCS interface modes allows only a 16-bit word alignment
pattern.
Basic double-width
Functional Mode
“Word Aligner in Double-Width Mode with 16-Bit PMA-PCS Interface
Bit-Slip Mode Word Aligner with 16-Bit PMA-PCS Interface Modes
Word Aligner in Double-Width Mode with 20-Bit PMA-PCS Interface Modes
Manual Alignment Mode Word Aligner with 20-Bit PMA-PCS Interface Modes
Bit-Slip Mode Word Aligner with 20-Bit PMA-PCS Interface Modes
lists the word aligner configurations allowed in functional modes with a
1–66. The only difference is that the manual alignment mode word
Manual alignment, Bit-slip
Allowed Word Aligner
Configurations
Chapter 1: Transceiver Architecture in Stratix IV Devices
Allowed Word Alignment
February 2011 Altera Corporation
7 bits, 10 bits, 20 bits
“Word Aligner in
Transceiver Block Architecture
Pattern Length
1–60. The only
“Word
1–60.
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