DK-DEV-4SGX230N Altera, DK-DEV-4SGX230N Datasheet - Page 889

• Manufacturer Part Number: DK-DEV-4SGX230N
• Description: KIT DEVELOPMENT STRATIX IV
• Manufacturer: Altera
• Series: Stratix® IVr
• Type: FPGAr

Specifications of DK-DEV-4SGX230N

• Contents: Development Board, Universal Power Supply, Cables and Software
• Silicon Manufacturer: Altera
• Core Architecture: FPGA
• Core Sub-architecture: Stratix
• Silicon Core Number: EP4S
• Silicon Family Name: Stratix IV GX
• Rohs Compliant: Yes
• For Use With/related Products: EP4SGX230K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-2594

Chapter 5: Dynamic Reconfiguration in Stratix IV Devices
Dynamic Reconfiguration Modes Implementation
Table 5–10. rx_dataoutfull[63:0] FPGA Fabric-Transceiver Channel Interface Signal Descriptions (Part 4 of 6)
February 2011 Altera Corporation
20-bit FPGA fabric-transceiver
Channel Interface with PCS-PMA
set to 20 bits
20-bit FPGA fabric-transceiver
Channel Interface with PCS-PMA
set to 10 bits
Channel Interface Description
FPGA Fabric-Transceiver
Two 10-bit Data (rx_dataout)
rx_dataoutfull[9:0] - rx_dataout (LSByte) and rx_dataoutfull[25:16] -
rx_dataout (MSByte)
wo Receiver Sync Status Bits
rx_dataoutfull[10] - rx_syncstatus (LSB) and rx_dataoutfull[26] -
rx_syncstatus (MSB)
rx_dataoutfull[11] and rx_dataoutfull[27]: 8B/10B disparity error indicator
(rx_disperr)
Two Receiver Pattern Detect Bits
rx_dataoutfull[12] - rx_patterndetect (LSB) and rx_dataoutfull[28] -
rx_patterndetect (MSB)
rx_dataoutfull[13] and rx_dataoutfull[29]: Rate Match FIFO deletion status
indicator (rx_rmfifodatadeleted) in non-PCIe/PCIe modes
rx_dataoutfull[14] and rx_dataoutfull[30]: Rate Match FIFO insertion status
indicator (rx_rmfifodatainserted) in non-PCIe/PCIe modes
rx_dataoutfull[15] and rx_dataoutfull[31]: 8B/10B running disparity
indicator (rx_runningdisp)
Two 10-bit Data
rx_dataoutfull[9:0] - rx_dataout (LSByte) and rx_dataoutfull[41:32] -
rx_dataout (MSByte)
Two Receiver Sync Status Bits
rx_dataoutfull[10] - rx_syncstatus (LSB) and rx_dataoutfull[42] -
rx_syncstatus (MSB)
rx_dataoutfull[11] and rx_dataoutfull[43]: 8B/10B disparity error indicator
(rx_disperr)
Two Receiver Pattern Detect Bits
rx_dataoutfull[12] - rx_patterndetect (LSB) and rx_dataoutfull[44] -
rx_patterndetect (MSB)
rx_dataoutfull[13] and rx_dataoutfull[45]: Rate Match FIFO deletion status
indicator (rx_rmfifodatadeleted) in non-PCIe/PCIe modes
rx_dataoutfull[14] and rx_dataoutfull[46]: Rate Match FIFO insertion status
indicator (rx_rmfifodatainserted) in non-PCIe/PCIe modes
rx_dataoutfull[15] and rx_dataoutfull[47]: 8B/10B running disparity
indicator (rx_runningdisp)
Receive Signal Description (Based on Stratix IV GX Supported FPGA
Fabric-Transceiver Channel Interface Widths)
Stratix IV Device Handbook Volume 2: Transceivers
5–43