DK-DEV-4SGX230N Altera, DK-DEV-4SGX230N Datasheet - Page 230

• Manufacturer Part Number: DK-DEV-4SGX230N
• Description: KIT DEVELOPMENT STRATIX IV
• Manufacturer: Altera
• Series: Stratix® IVr
• Type: FPGAr

Specifications of DK-DEV-4SGX230N

• Contents: Development Board, Universal Power Supply, Cables and Software
• Silicon Manufacturer: Altera
• Core Architecture: FPGA
• Core Sub-architecture: Stratix
• Silicon Core Number: EP4S
• Silicon Family Name: Stratix IV GX
• Rohs Compliant: Yes
• For Use With/related Products: EP4SGX230K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-2594

7–10
Figure 7–5. Number of DQS/DQ Groups per Bank in EP4SGX290 and EP4SGX360 Devices in the 780-Pin FineLine BGA
Package
Notes to
(1) These numbers are preliminary until the devices are available.
(2) EP4SGX290 and EP4SGX360 devices do not support ×32/×36 mode. To interface with a ×36 QDR II+/QDR II SRAM device, refer to
Stratix IV Device Handbook Volume 1
×16/×18 DQS/DQ Groups for a ×36 QDR II+/QDR II SRAM Interface” on page
Figure
(Note
7–5:
1),
(2)
DLL1
DLL0
40 User I/Os
I/O Bank 8A
I/O Bank 3A
40 User I/Os
x16/x18=1
x16/x18=1
x8/x9=3
x8/x9=3
x4=6
x4=6
EP4SGX290 and EP4SGX360 Devices
in the 780-Pin FineLine BGA
32 User I/Os
I/O Bank 3C
32 User I/Os
x16/x18=0
I/O Bank 8C
x16/x18=0
x8/x9=1
x8/x9=1
x4=3
x4=3
32 User I/Os
I/O Bank 4C
32 User I/Os
x16/x18=0
I/O Bank 7C
x16//x18=0
x8/x9=1
x8/x9=1
x4=3
x4=3
7–26.
Chapter 7: External Memory Interfaces in Stratix IV Devices
I/O Bank 7A
I/O Bank 4A
40 User I/Os
40 User I/Os
x16/x18=1
x16/x18=1
x8/x9=3
x8/x9=3
x4=6
x4=6
DLL3
DLL2
February 2011 Altera Corporation
Memory Interfaces Pin Support
“Combining