DK-DEV-4SGX230N Altera, DK-DEV-4SGX230N Datasheet - Page 485

• Manufacturer Part Number: DK-DEV-4SGX230N
• Description: KIT DEVELOPMENT STRATIX IV
• Manufacturer: Altera
• Series: Stratix® IVr
• Type: FPGAr

Specifications of DK-DEV-4SGX230N

• Contents: Development Board, Universal Power Supply, Cables and Software
• Silicon Manufacturer: Altera
• Core Architecture: FPGA
• Core Sub-architecture: Stratix
• Silicon Core Number: EP4S
• Silicon Family Name: Stratix IV GX
• Rohs Compliant: Yes
• For Use With/related Products: EP4SGX230K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-2594

Chapter 1: Transceiver Architecture in Stratix IV Devices
Transceiver Block Architecture
Figure 1–36. Receiver Input Buffer
Table 1–17. Electrical Features Supported by the Receiver Input Buffer for Stratix IV GX and GT Devices
February 2011 Altera Corporation
Stratix IV GX
0.6 Gbps to
8.5 Gbps
Stratix IV GT
0.6 Gbps to
11.3 Gbps
Note to
(1) Programmable equalization settings are 0 to 16 dB for Stratix IV GX and GT devices.
Data Rate
Table
1–17:
From Serial Data
(rx_datain)
Input Pins
I/O Standard
1.4 V PCML
1.5 V PCML
2.5 V PCML
1.4 V PCML
Table 1–17
input buffer.
The Stratix IV GX and GT receiver buffers support the following features:
■
■
■
■
■
LVPECL
LVDS
LVDS
Programmable differential OCT
Programmable V
AC and DC coupling
Programmable equalization and DC gain
Signal threshold detection circuitry
Receiver Input Buffer
lists the electrical features supported by the Stratix IV GX and GT receiver
120/150-
85/100/
Vcm
RX
Ω
Differential OCT with
85, 100, 120, 150
85, 100, 120, 150
85, 100, 120, 150
85, 100, 120, 150
85, 100, 120, 150
85, 100, 120, 150
85, 100, 120, 150
Calibration (Ω)
0.82/1.1-V
CM
the Reverse Serial Loopback (Pre-CDR)
To the Transmitter Output Buffer in
Configuration
V
CM
0.82
0.82
0.82
0.82
0.82
1.1
1.1
Equalization
Threshold
Detection
(V)
DC Gain
Circuitry
Circuitry
Signal
and
Stratix IV Device Handbook Volume 2: Transceivers
Coupling
AC, DC
AC, DC
AC, DC
AC, DC
AC, DC
AC
AC
To CDR
Signal Detect
Programmable
DC Gain (dB)
(Note 1)
up to 16
up to 16
up to 16
up to 16
up to 16
up to 16
up to 16
1–41