DK-DEV-4SGX230N Altera, DK-DEV-4SGX230N Datasheet - Page 338

• Manufacturer Part Number: DK-DEV-4SGX230N
• Description: KIT DEVELOPMENT STRATIX IV
• Manufacturer: Altera
• Series: Stratix® IVr
• Type: FPGAr

Specifications of DK-DEV-4SGX230N

• Contents: Development Board, Universal Power Supply, Cables and Software
• Silicon Manufacturer: Altera
• Core Architecture: FPGA
• Core Sub-architecture: Stratix
• Silicon Core Number: EP4S
• Silicon Family Name: Stratix IV GX
• Rohs Compliant: Yes
• For Use With/related Products: EP4SGX230K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-2594

10–4
Configuration Features
Table 10–3. Configuration Features for Stratix IV Devices
Stratix IV Device Handbook Volume 1
FPP
Fast AS
PS
JTAG
Note to
(1) In these modes, the host system must send a DCLK that is ×4 the data rate.
Configuration
Scheme
Table
10–3:
f
f
MAX II device or a microprocessor with flash memory
Serial configuration device
MAX II device or a microprocessor with flash memory
Download cable
MAX II device or a microprocessor with flash memory
Download cable
For more information about setting device configuration options or creating
configuration files, refer to the
Formats
Stratix IV devices offer design security, decompression, and remote system upgrade
features. Design security using configuration bitstream encryption is available in
Stratix IV devices, which protects your designs. Stratix IV devices can receive a
compressed configuration bitstream and decompress this data in real-time, reducing
storage requirements and configuration time. You can make real-time system
upgrades from remote locations of your Stratix IV designs with the remote system
upgrade feature.
Table 10–3
scheme.
You can also refer to the following:
■
■
■
If your system already contains a common flash interface (CFI) flash memory, you can
use it for Stratix IV device configuration storage as well. The MAX II parallel flash
loader (PFL) feature in MAX II devices provides an efficient method to program CFI
flash memory devices through the JTAG interface and provides the logic to control
configuration from the flash memory device to the Stratix IV device. Both PS and FPP
configuration modes are supported using this PFL feature.
For more information about PFL, refer to
For more information about programming Altera serial configuration devices, refer to
“Programming Serial Configuration Devices” on page
For more information about the configuration data decompression feature, refer to
“Configuration Data Decompression” on page
For more information about the remote system upgrade feature, refer to
System Upgrades” on page
For more information about the design security feature, refer to
on page
chapters in volume 2 of the Configuration Handbook.
Configuration Method
lists which configuration features you can use in each configuration
10–63.
Chapter 10: Configuration, Design Security, and Remote System Upgrades in Stratix IV Devices
Device Configuration Options
10–49.
Parallel Flash Loader Megafunction User
Decompression
v
10–47.
v
v
v
—
—
(1)
10–22.
and
Security
Configuration File
Design
v
April 2011 Altera Corporation
v
v
v
—
—
(1)
“Design Security”
Configuration Features
“Remote
Upgrade
Remote
System
—
v
—
—
—
—
Guide.