DK-DEV-4SGX230N Altera, DK-DEV-4SGX230N Datasheet - Page 417

• Manufacturer Part Number: DK-DEV-4SGX230N
• Description: KIT DEVELOPMENT STRATIX IV
• Manufacturer: Altera
• Series: Stratix® IVr
• Type: FPGAr

Specifications of DK-DEV-4SGX230N

• Contents: Development Board, Universal Power Supply, Cables and Software
• Silicon Manufacturer: Altera
• Core Architecture: FPGA
• Core Sub-architecture: Stratix
• Silicon Core Number: EP4S
• Silicon Family Name: Stratix IV GX
• Rohs Compliant: Yes
• For Use With/related Products: EP4SGX230K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-2594

Chapter 11: SEU Mitigation in Stratix IV Devices
Recovering From CRC Errors
Recovering From CRC Errors
February 2011 Altera Corporation
1
5. In the Device and Pin Options dialog box, click the Error Detection CRC tab.
6. Turn on Enable error detection CRC
Figure 11–2. Enabling the Error Detection CRC Feature in the Quartus II Software
7. In the Divide error check frequency by pull-down list, enter a valid divisor as
The divide value divides the frequency of the configuration oscillator output clock
that clocks the CRC circuitry.
8. Click OK.
The system that the Stratix IV device resides in must control device reconfiguration.
After detecting an error on the CRC_ERROR pin, strobing the nCONFIG signal low directs
the system to perform the reconfiguration at a time when it is safe for the system to
reconfigure the device.
When the data bit is rewritten with the correct value by reconfiguring the device, the
device functions correctly.
While soft errors are uncommon in Altera devices, certain high-reliability applications
require a design to account for these errors.
listed in
Table 11–5 on page
11–8.
(Figure
11–2).
Stratix IV Device Handbook Volume 1
11–11