DK-DEV-4SGX230N Altera, DK-DEV-4SGX230N Datasheet - Page 413
![KIT DEVELOPMENT STRATIX IV](/photos/28/41/284156/dk-dev-4sgx230n_sml.jpg)
DK-DEV-4SGX230N
Manufacturer Part Number
DK-DEV-4SGX230N
Description
KIT DEVELOPMENT STRATIX IV
Manufacturer
Altera
Series
Stratix® IVr
Type
FPGAr
Datasheets
1.EP4SGX110DF29C3N.pdf
(80 pages)
2.EP4SGX110DF29C3N.pdf
(1154 pages)
3.DK-DEV-4SGX230N.pdf
(2 pages)
4.DK-DEV-4SGX530N.pdf
(57 pages)
Specifications of DK-DEV-4SGX230N
Contents
Development Board, Universal Power Supply, Cables and Software
Silicon Manufacturer
Altera
Core Architecture
FPGA
Core Sub-architecture
Stratix
Silicon Core Number
EP4S
Silicon Family Name
Stratix IV GX
Rohs Compliant
Yes
For Use With/related Products
EP4SGX230K
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
544-2594
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DK-DEV-4SGX230N
Manufacturer:
Altera
Quantity:
135
- EP4SGX110DF29C3N PDF datasheet
- EP4SGX110DF29C3N PDF datasheet #2
- DK-DEV-4SGX230N PDF datasheet #3
- DK-DEV-4SGX530N PDF datasheet #4
- Current page: 413 of 1154
- Download datasheet (32Mb)
Chapter 11: SEU Mitigation in Stratix IV Devices
Error Detection Block
Figure 11–1. Error Detection Block Diagram
Table 11–4. Error Detection Registers (Part 1 of 2)
February 2011 Altera Corporation
Syndrome Register
Error Message
Register
Readback bit
stream with
expected CRC
included
Register
Error Detection Registers
Error Injection Block
Injection Register
Fault Injection
JTAG Fault
Register
There is one set of 16-bit registers in the error detection circuitry that stores the
computed CRC signature. A non-zero value on the syndrome register causes the
CRC_ERROR pin to be set high.
Figure 11–1
block.
Table 11–4
Error Detection
State Machine
This register contains the CRC signature of the current frame through the error detection
verification cycle. The CRC_ERROR signal is derived from the contents of this register.
This 46-bit register contains information on the error type, location of the error, and the actual
syndrome. The types of errors and location reported are single- and double-adjacent bit errors.
The location bits for other types of errors are not identified by the error message register. The
content of the register can be shifted out through the SHIFT_EDERROR_REG JTAG instruction or to
the core through the core interface.
lists the registers shown in
shows the error detection circuitry, syndrome registers, and error injection
Control Signals
JTAG Update
JTAG TDO
JTAG Shift
Register
Register
Calculation and Error
Error Message
16-Bit CRC
Search Engine
Register
Figure
Description
30
46
General Routing
User Update
User Shift
Register
11–1.
Register
8
Syndrome
Register
Stratix IV Device Handbook Volume 1
16
CRC_ERROR
11–7
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