DK-DEV-4SGX230N Altera, DK-DEV-4SGX230N Datasheet - Page 880

• Manufacturer Part Number: DK-DEV-4SGX230N
• Description: KIT DEVELOPMENT STRATIX IV
• Manufacturer: Altera
• Series: Stratix® IVr
• Type: FPGAr

Specifications of DK-DEV-4SGX230N

• Contents: Development Board, Universal Power Supply, Cables and Software
• Silicon Manufacturer: Altera
• Core Architecture: FPGA
• Core Sub-architecture: Stratix
• Silicon Core Number: EP4S
• Silicon Family Name: Stratix IV GX
• Rohs Compliant: Yes
• For Use With/related Products: EP4SGX230K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-2594

5–34
Stratix IV Device Handbook Volume 2: Transceivers
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Consider the following scenario:
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Option 2 is applicable because the design requires the individual transceiver channels
to be reconfigured with different data rates to another Basic or Protocol functional
mode with rate matching. Therefore, each channel can be reconfigured to another
Basic or Protocol functional mode with rate matching enabled and a different data
rate.
Enable this option if you want the individual transmitter channel’s tx_clkout
signal to provide the read clock to its respective Receive Phase Compensation
FIFO.
This option is typically enabled when all the transceiver channels have rate
matching enabled with different data rates and are reconfigured to another Basic
or Protocol functional mode with rate matching enabled.
TX0/RX0: You want to dynamically reconfigure the Basic 1 Gbps configuration
with rate matching enabled to the Basic 2 Gbps configuration with rate matching
enabled.
TX1/RX1: You want to dynamically reconfigure the Basic 4 Gbps configuration
with rate matching enabled to the Basic 1 Gbps configuration with rate matching
enabled.
TX2/RX2 and TX3/RX3: You want to dynamically reconfigure the Basic
3.125 Gbps configuration with rate matching enabled to the 1 Gbps configuration
with rate matching and vice versa.
Channel and CMU PLL reconfiguration mode is enabled in the
ALTGX_RECONFIG MegaWizard Plug-In Manager.
Option 2: Use the Respective Channel Transmitter Core Clocks
Chapter 5: Dynamic Reconfiguration in Stratix IV Devices
Dynamic Reconfiguration Modes Implementation
February 2011 Altera Corporation