DK-DEV-4SGX230N Altera, DK-DEV-4SGX230N Datasheet - Page 311
![KIT DEVELOPMENT STRATIX IV](/photos/28/41/284156/dk-dev-4sgx230n_sml.jpg)
DK-DEV-4SGX230N
Manufacturer Part Number
DK-DEV-4SGX230N
Description
KIT DEVELOPMENT STRATIX IV
Manufacturer
Altera
Series
Stratix® IVr
Type
FPGAr
Datasheets
1.EP4SGX110DF29C3N.pdf
(80 pages)
2.EP4SGX110DF29C3N.pdf
(1154 pages)
3.DK-DEV-4SGX230N.pdf
(2 pages)
4.DK-DEV-4SGX530N.pdf
(57 pages)
Specifications of DK-DEV-4SGX230N
Contents
Development Board, Universal Power Supply, Cables and Software
Silicon Manufacturer
Altera
Core Architecture
FPGA
Core Sub-architecture
Stratix
Silicon Core Number
EP4S
Silicon Family Name
Stratix IV GX
Rohs Compliant
Yes
For Use With/related Products
EP4SGX230K
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
544-2594
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DK-DEV-4SGX230N
Manufacturer:
Altera
Quantity:
135
- EP4SGX110DF29C3N PDF datasheet
- EP4SGX110DF29C3N PDF datasheet #2
- DK-DEV-4SGX230N PDF datasheet #3
- DK-DEV-4SGX530N PDF datasheet #4
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- Download datasheet (32Mb)
Chapter 8: High-Speed Differential I/O Interfaces and DPA in Stratix IV Devices
Source-Synchronous Timing Budget
February 2011 Altera Corporation
Transmitter Channel-to-Channel Skew
Receiver Skew Margin for Non-DPA Mode
f
Transmitter channel-to-channel skew (TCCS) is an important parameter based on the
Stratix IV transmitter in a source synchronous differential interface. This parameter is
used in receiver skew margin calculation. For more information, refer to
Skew Margin for Non-DPA Mode” on page
TCCS is the difference between the fastest and slowest data output transitions,
including the TCO variation and clock skew. For LVDS transmitters, the TimeQuest
Timing Analyzer provides a TCCS report, which shows TCCS values for serial output
ports.
You can get the TCCS value from the TCCS report (report_TCCS) in the Quartus II
compilation report under the TimeQuest Timing Analyzer, or from the
Switching Characteristics for Stratix IV Devices
Changes in system environment, such as temperature, media (cable, connector, or
PCB), and loading effect the receiver ’s setup and hold times; internal skew affects the
sampling ability of the receiver.
Different modes of LVDS receivers use different specifications that can help in
deciding the ability to sample the received serial data correctly. In DPA mode, you
must use DPA jitter tolerance instead of receiver input skew margin (RSKM).
In non-DPA mode, use TCCS, RSKM, and sampling window (SW) specifications for
high-speed source-synchronous differential signals in the receiver data path. The
relationship between RSKM, TCCS, and SW is expressed by the RSKM equation
shown in
Equation 8–1. RSKM
Conventions used for the equation:
■
■
■
■
Time unit interval (TUI)—Time period of the serial data.
RSKM—The timing margin between the receiver ’s clock input and the data input
sampling window.
SW—The period of time that the input data must be stable to ensure that data is
successfully sampled by the LVDS receiver. The SW is a device property and
varies with device speed grade.
TCCS—The timing difference between the fastest and the slowest output edges,
including t
The clock is included in the TCCS measurement.
Equation
CO
variation and clock skew, across channels driven by the same PLL.
8–1.
RSKM
=
TUI SW
--------------------------------------------- -
–
8–33.
chapter.
2
–
TCCS
Stratix IV Device Handbook Volume 1
DC and
“Receiver
8–33
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