DK-DEV-4SGX230N Altera, DK-DEV-4SGX230N Datasheet - Page 905

• Manufacturer Part Number: DK-DEV-4SGX230N
• Description: KIT DEVELOPMENT STRATIX IV
• Manufacturer: Altera
• Series: Stratix® IVr
• Type: FPGAr

Specifications of DK-DEV-4SGX230N

• Contents: Development Board, Universal Power Supply, Cables and Software
• Silicon Manufacturer: Altera
• Core Architecture: FPGA
• Core Sub-architecture: Stratix
• Silicon Core Number: EP4S
• Silicon Family Name: Stratix IV GX
• Rohs Compliant: Yes
• For Use With/related Products: EP4SGX230K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-2594

Chapter 5: Dynamic Reconfiguration in Stratix IV Devices
Dynamic Reconfiguration Modes Implementation
Figure 5–30. Using logical_tx_pll_sel and logical_tx_pll_sel_en Ports
Table 5–11. Various Combinations of the logical_tx_pll_sel and logical_tx_pll_sel_en Ports
February 2011 Altera Corporation
logical_tx_pll_sel
disabled
enabled
enabled
enabled
1
(logical reference index
specified on the port)
index value stored
(logical reference
logical_tx_pll_sel
logical tx pll
Table 5–11
uses either the logical_tx_pll_sel port value or the logical reference index value
stored in the .mif.
Figure 5–30
Table 5–11
reference index stored in the .mif (logical tx pll) and the logical reference index
specified at the logical_tx_pll_sel port.
Altera recommends keeping track of the transmitter PLL that drives the channel when
you configure a transceiver channel in the ALTGX MegaWizard Plug-In Manager.
The logical_tx_pll_sel port does not modify transceiver settings on the receiver
side.
If both the logical_tx_pll_sel and logical_tx_pll_sel_en ports are enabled,
reconfigure the transmitter PLL. Keep the logical_tx_pll_sel and
logical_tx_pll_sel_en signals at a constant logic level until the dynamic
reconfiguration controller asserts the channel_reconfig_done signal.
in the .mif)
logical_tx_pll_sel_en
enabled and value is 1
enabled and value is 0
shows the conditions under which the dynamic reconfiguration controller
lists how the dynamic reconfiguration controller selects between the logical
shows the logical_tx_pll_sel and logical_tx_pll_sel_en ports.
disabled
disabled
logical_tx_pll_sel_en
logical reference index value stored in the .mif (logical tx pll)
logical reference index value stored in the .mif (logical tx pll)
0
1
Logical Reference Index Value Selected by the
Value on the logical_tx_pll_sel port
Value on the logical_tx_pll_sel port
ALTGX_RECONFIG
logical reference index
instance
ALTGX_RECONFIG Instance
Stratix IV Device Handbook Volume 2: Transceivers
selected
value
5–59