DK-DEV-4SGX230N Altera, DK-DEV-4SGX230N Datasheet - Page 894

• Manufacturer Part Number: DK-DEV-4SGX230N
• Description: KIT DEVELOPMENT STRATIX IV
• Manufacturer: Altera
• Series: Stratix® IVr
• Type: FPGAr

Specifications of DK-DEV-4SGX230N

• Contents: Development Board, Universal Power Supply, Cables and Software
• Silicon Manufacturer: Altera
• Core Architecture: FPGA
• Core Sub-architecture: Stratix
• Silicon Core Number: EP4S
• Silicon Family Name: Stratix IV GX
• Rohs Compliant: Yes
• For Use With/related Products: EP4SGX230K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-2594

5–48
Stratix IV Device Handbook Volume 2: Transceivers
f
1
You can use the channel reconfiguration with transmitter PLL select mode along with
the CMU PLL reconfiguration mode only if it is a CMU PLL and not an ATX PLL. You
can first reconfigure the second CMU PLL to the desired data rate using CMU PLL
reconfiguration mode. Then use channel reconfiguration with transmitter PLL select
mode to reconfigure the transceiver channel to listen to the second CMU PLL.
For more information about supported configurations, refer to
Reconfiguration Mode Details” on page 5–19
on page
Channel reconfiguration with transmitter PLL select mode is not applicable to regular
transceiver channels in ×4 and ×8 bonded mode configurations.
For guidelines regarding re-using .mifs, specifying input reference clocks, or using
the logical_tx_pll_sel ports, refer to
For more information about reset, refer to the “Reset Sequence when Using Dynamic
Reconfiguration with the Channel and TX PLL select/reconfig Option” section in the
Reset Control and Power Down in Stratix IV Devices
Blocks Reconfigured in the Channel Reconfiguration with Transmitter PLL Select Mode
The blocks reconfigured in this mode have two types of multiplexers. When you
switch between the CMU PLLs within the same transceiver block, the multiplexer that
is reconfigured is within the transceiver block. It is located in the transmitter channel
path.
5–20.
“Special Guidelines” on page
Chapter 5: Dynamic Reconfiguration in Stratix IV Devices
and
chapter.
“Memory Initialization File (.mif)”
Dynamic Reconfiguration Modes Implementation
February 2011 Altera Corporation
“Transceiver Channel
5–56.