DK-DEV-4SGX230N Altera, DK-DEV-4SGX230N Datasheet - Page 986
![KIT DEVELOPMENT STRATIX IV](/photos/28/41/284156/dk-dev-4sgx230n_sml.jpg)
DK-DEV-4SGX230N
Manufacturer Part Number
DK-DEV-4SGX230N
Description
KIT DEVELOPMENT STRATIX IV
Manufacturer
Altera
Series
Stratix® IVr
Type
FPGAr
Datasheets
1.EP4SGX110DF29C3N.pdf
(80 pages)
2.EP4SGX110DF29C3N.pdf
(1154 pages)
3.DK-DEV-4SGX230N.pdf
(2 pages)
4.DK-DEV-4SGX530N.pdf
(57 pages)
Specifications of DK-DEV-4SGX230N
Contents
Development Board, Universal Power Supply, Cables and Software
Silicon Manufacturer
Altera
Core Architecture
FPGA
Core Sub-architecture
Stratix
Silicon Core Number
EP4S
Silicon Family Name
Stratix IV GX
Rohs Compliant
Yes
For Use With/related Products
EP4SGX230K
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
544-2594
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DK-DEV-4SGX230N
Manufacturer:
Altera
Quantity:
135
- EP4SGX110DF29C3N PDF datasheet
- EP4SGX110DF29C3N PDF datasheet #2
- DK-DEV-4SGX230N PDF datasheet #3
- DK-DEV-4SGX530N PDF datasheet #4
- Current page: 986 of 1154
- Download datasheet (32Mb)
1–28
Table 1–7. MegaWizard Plug-In Manager Options (Modes Screen) (Part 1 of 2)
Stratix IV Device Handbook Volume 3
Dynamic Reconfiguration Settings
What do you want to be able
to dynamically reconfigure in
the transceiver?
Enable Channel and
Transmitter PLL
Reconfiguration
ALTGX Setting
Table 1–7
Plug-In Manager for your ALTGX custom megafunction variation.
The different dynamic reconfiguration modes available are
listed in the Reconfiguration Settings screen. Based on
which portion of the transceiver you want to reconfigure,
select the corresponding options and connect the
ALTGX_RECONFIG instance to the ALTGX instance.
■
■
These ports provide the interface between the receiver
channel and the dynamic reconfiguration controller.
■
You must enable this option to reconfigure one of the
following: Transmitter local divider block, CMU PLL,
Transceiver channel, or Both the CMU PLL and transceiver
channel.
■
■
lists the different options available in the Modes screen of the MegaWizard
Analog controls (VOD, Pre-emphasis, and Manual
Equalization and EyeQ)—Enable this option to dynamically
reconfigure the PMA control settings similar to VOD,
pre-emphasis, manual equalization, DC gain, and EyeQ.
Enable adaptive equalizer control—Selecting this option
enables the Adaptive Equalization (AEQ) hardware and
provides the following additional ports:
■
■
Offset cancellation for receiver channels—This option is
enabled by default for Receiver only and Receiver and
Transmitter configurations. It is not available for
Transmitter only configurations.
Ensure that you connect a dynamic reconfiguration
controller to all the transceiver channels in the design.
Channel Interface—This option allows channel interface
reconfiguration.
Use alternate CMU Transmitter PLL—This option sets up
the alternate PLL so that the transceiver channel can
optionally select between the output of the main and
alternate transmitter PLL.
Use additional CMU/ATX Transmitter PLLs from outside
the Transceiver Block—This option allows you to select a
maximum of four transmitter PLLs. For example, you can
select the ATX PLL as the main PLL and three additional
PLLs.
■
aeq_togxb[]
aeq_fromgxb[]
How many additional PLLs are used?—You can have a
maximum of two PLLs outside the transceiver block.
Description
Chapter 1: ALTGX Transceiver Setup Guide for Stratix IV Devices
February 2011 Altera Corporation
“Dynamic Reconfiguration
Modes Implementation”
section, “PMA Controls
Reconfiguration Mode
Details” section, “Enabling
the AEQ Control Logic and
AEQ Hardware” section, and
the “Offset Cancellation
Feature” section in the
Dynamic Reconfiguration in
Stratix IV Devices
“Transceiver Channel
Reconfiguration Modes
Details” section, “FPGA
Fabric-Transceiver Channel
Interface Selection” section,
“Transceiver Channel
Reconfiguration Modes
Details” section. and the
“Multi-PLL Settings”
section in the
Reconfiguration in
Stratix IV Devices
Reconfiguration Settings
Reference
Dynamic
chapter.
chapter.
Related parts for DK-DEV-4SGX230N
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
![DK-DEV-2AGX125N](/photos/28/41/284154/dk-dev-2agx125n_tmb.jpg)
Part Number:
Description:
KIT DEV ARRIA II GX FPGA 2AGX125
Manufacturer:
Altera
Datasheet:
![DK-DEV-3CLS200N](/photos/9/24/92409/dk-dev-3cls200n_tmb.jpg)
Part Number:
Description:
KIT DEV CYCLONE III LS EP3CLS200
Manufacturer:
Altera
Datasheet:
![DK-DEV-4SE530N](/photos/28/41/284157/dk-dev-4se530n_tmb.jpg)
Part Number:
Description:
KIT DEV STRATIX IV FPGA 4SE530
Manufacturer:
Altera
Datasheet:
![DK-DEV-2AGX260N](/photos/28/41/284175/dk-dev-2agx260n_tmb.jpg)
Part Number:
Description:
KIT DEV FPGA 2AGX260 W/6.375G TX
Manufacturer:
Altera
Datasheet:
![DK-DEV-5M570ZN](/photos/18/31/183180/dk-dev-5m570zn_tmb.jpg)
Part Number:
Description:
KIT DEV MAX V 5M570Z
Manufacturer:
Altera
Datasheet:
![DK-DEV-5SGXEA7/ES](/images/manufacturer_photos/0/0/40/altera_tmb.jpg)
Part Number:
Description:
KIT DEV STRATIX V FPGA 5SGXEA7
Manufacturer:
Altera
Datasheet:
![DK-DEV-3SL150N](/photos/9/20/92079/dk-dev-3sl150n_tmb.jpg)
Part Number:
Description:
KIT DEVELOPMENT STRATIX III
Manufacturer:
Altera
Datasheet:
![DK-DEV-1AGX60N](/photos/9/31/93181/mfgdk-dev-1agx60n_tmb.jpg)
Part Number:
Description:
KIT DEV ARRIA GX 1AGX60N
Manufacturer:
Altera
Datasheet:
![DK-DEV-4CGX150N](/images/manufacturer_photos/0/0/40/altera_tmb.jpg)
Part Number:
Description:
KIT STARTER CYCLONE IV GX
Manufacturer:
Altera
Datasheet:
![DK-DEV-4SGX530N](/images/manufacturer_photos/0/0/40/altera_tmb.jpg)
Part Number:
Description:
KIT DEVELOPMENT STRATIX IV
Manufacturer:
Altera
Datasheet:
![EP610PC-35](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 35 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet:
![EP610PC-15](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 15 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet: