DK-DEV-4SGX230N Altera, DK-DEV-4SGX230N Datasheet - Page 967

• Manufacturer Part Number: DK-DEV-4SGX230N
• Description: KIT DEVELOPMENT STRATIX IV
• Manufacturer: Altera
• Series: Stratix® IVr
• Type: FPGAr

Specifications of DK-DEV-4SGX230N

• Contents: Development Board, Universal Power Supply, Cables and Software
• Silicon Manufacturer: Altera
• Core Architecture: FPGA
• Core Sub-architecture: Stratix
• Silicon Core Number: EP4S
• Silicon Family Name: Stratix IV GX
• Rohs Compliant: Yes
• For Use With/related Products: EP4SGX230K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-2594

Chapter 1: ALTGX Transceiver Setup Guide for Stratix IV Devices
Parameter Settings
Table 1–1. MegaWizard Plug-In Manager Options (General Screen for Basic Mode) (Part 6 of 10)
February 2011 Altera Corporation
What is the channel width?
ALTGX Setting
Basic
Deterministic Latency
This option determines the FPGA fabric-Transceiver
interface width.
■
■
Basic (PMA Direct)
This option determines the FPGA fabric-Transceiver
interface width.
■
■
GIGE
This option determines the FPGA fabric-Transceiver
interface width. In GIGE mode, only 8 bits are allowed.
(OIF) CEI PHY Interface
This option selects the FPGA fabric-Transceiver width. In
(OIF) CEI PHY Interface mode, only 32 bits are allowed.
PCIe
This option determines the FPGA fabric-Transceiver
interface width.
■
■
SDI
This option determines the FPGA fabric-Transceiver
interface width:
■
■
■
■
Serial RapidIO
The channel width is fixed to 16 in Serial RapidIO mode.
Single-width mode—Selecting 8 or 10 bits bypasses
the byte serializer/deserializer. Selecting 16 or 20 bits
uses the byte serializer/deserializer.
Double-width mode—Selecting 16 or 20 bits
bypasses the byte serializer/deserializer. Selecting 32
or 40 bits uses the byte serializer/deserializer.
Single-width mode—You can select 8 or 10 bits.
Double-width mode— You can select 16 or 20 bits.
In PCIe Gen1 (2.5 Gbps) mode, 8 and 16 bits are
allowed.
In PCIe Gen2 (5 Gbps) mode, only 16 bits are allowed.
HD mode—10-bit and 20-bit channel widths are
allowed.
3G mode—only 20-bit channel width is allowed.
10-bit configuration—the byte serializer is not used.
20-bit configuration—the byte serializer is used.
Description
“Byte Serializer” and “Byte
Deserializer” sections in the
Transceiver Architecture in
Stratix IV Devices
Stratix IV Device Handbook Volume 3
Reference
chapter.
1–9