DK-DEV-4SGX230N Altera, DK-DEV-4SGX230N Datasheet - Page 629
![KIT DEVELOPMENT STRATIX IV](/photos/28/41/284156/dk-dev-4sgx230n_sml.jpg)
DK-DEV-4SGX230N
Manufacturer Part Number
DK-DEV-4SGX230N
Description
KIT DEVELOPMENT STRATIX IV
Manufacturer
Altera
Series
Stratix® IVr
Type
FPGAr
Datasheets
1.EP4SGX110DF29C3N.pdf
(80 pages)
2.EP4SGX110DF29C3N.pdf
(1154 pages)
3.DK-DEV-4SGX230N.pdf
(2 pages)
4.DK-DEV-4SGX530N.pdf
(57 pages)
Specifications of DK-DEV-4SGX230N
Contents
Development Board, Universal Power Supply, Cables and Software
Silicon Manufacturer
Altera
Core Architecture
FPGA
Core Sub-architecture
Stratix
Silicon Core Number
EP4S
Silicon Family Name
Stratix IV GX
Rohs Compliant
Yes
For Use With/related Products
EP4SGX230K
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
544-2594
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DK-DEV-4SGX230N
Manufacturer:
Altera
Quantity:
135
- EP4SGX110DF29C3N PDF datasheet
- EP4SGX110DF29C3N PDF datasheet #2
- DK-DEV-4SGX230N PDF datasheet #3
- DK-DEV-4SGX530N PDF datasheet #4
- Current page: 629 of 1154
- Download datasheet (32Mb)
Chapter 1: Transceiver Architecture in Stratix IV Devices
Transceiver Block Architecture
Figure 1–151. Synchronization State Machine in Serial RapidIO Mode
February 2011 Altera Corporation
1
1
Figure 1–151
implemented in Serial RapidIO functional mode.
Rate Match FIFO in Serial RapidIO Mode
In Serial RapidIO mode, the rate match FIFO is capable of compensating for up to
±100 PPM (200 PPM total) difference between the upstream transmitter and the local
receiver reference clock.
To enable the rate match FIFO in Serial RapidIO mode, the transceiver channel must
have both the transmitter and receiver channel instantiated. You must select the
Receiver and Transmitter option in the What is the operation mode? field in the
ALTGX MegaWizard Plug-In Manager. The 8B/10B encoder/decoder is always
enabled in Serial RapidIO mode.
Rate matcher is an optional block available for selection in SRIO functional mode.
However, this block is not fully compliant to the SRIO specification.
Data = !Valid
ecntr = 3
shows a conceptual view of the synchronization state machine
Synchronized Error
if Data == Comma
if Data == !Valid
Comma Detect
Loss of Sync
Synchronized
if gcntr==255
kcntr=kcntr
kcntr++
ecntr++
gcntr=0
gcntr=0
gcntr++
Detect
ecntr--
else
else
else
Data = Comma
kcntr = 127
Data = !Valid
Data=Valid
ecntr = 0
Stratix IV Device Handbook Volume 2: Transceivers
Data = valid;
kcntr < 127
1–185
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