DK-DEV-4SGX230N Altera, DK-DEV-4SGX230N Datasheet - Page 114

• Manufacturer Part Number: DK-DEV-4SGX230N
• Description: KIT DEVELOPMENT STRATIX IV
• Manufacturer: Altera
• Series: Stratix® IVr
• Type: FPGAr

Specifications of DK-DEV-4SGX230N

• Contents: Development Board, Universal Power Supply, Cables and Software
• Silicon Manufacturer: Altera
• Core Architecture: FPGA
• Core Sub-architecture: Stratix
• Silicon Core Number: EP4S
• Silicon Family Name: Stratix IV GX
• Rohs Compliant: Yes
• For Use With/related Products: EP4SGX230K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-2594

4–34
Table 4–9. DSP Block Dynamic Signals (Part 1 of 2)
Stratix IV Device Handbook Volume 1
■
■
output_round
chainout_round
output_saturate
chainout_saturate
signa
signb
Signal Name
DSP Block Control Signals
Use the rounding and saturation function just described in regular supported
multiplication operations, as specified in
accumulation-type operations, use the following convention:
The functionality of the round logic unit is in the format of:
Likewise, the functionality of the saturation logic unit is in the format of:
If you use both the rounding and saturation logic units for an accumulation type of
operation, the format is:
The Stratix IV DSP block is configured using a set of static and dynamic signals. You
can configure the DSP block dynamic signals. You can set the signals to toggle or not
toggle at run time.
Result = RND[
Result = SAT[
Result = SAT[RND[
Signed/unsigned control for all multipliers and adders.
■
■
■
■
■
■
Round control for the first stage round and saturation block.
■
■
Round control for the second stage round and saturation block.
■
■
Saturation control for the first stage round and saturation block for
Q-format multiply. If you enable both rounding and saturation,
saturation is done on the rounded result.
■
■
Saturation control for the second stage round and saturation block for
Q-format multiply. If you enable both rounding and saturation,
saturation is done on the rounded result.
■
■
signa for “multiplicand” input bus to dataa[17:0] to each
multiplier
signb for “multiplier” input bus datab[17:0] to each multiplier
signa = 1, signb = 1 for signed-signed multiplication
signa = 1, signb = 0 for signed-unsigned multiplication
signa = 0, signb = 1 for unsigned-signed multiplication
signa = 0, signb = 0 for unsigned-unsigned multiplication
output_round = 1 for rounding on multiply output
output_round = 0 for normal multiply output
chainout_round = 1 for rounding multiply output
chainout_round = 0 for normal multiply output
output_saturate = 1 for saturation support
output_saturate = 0 for no saturation support
chainout_saturate = 1 for saturation support
chainout_saturate = 0 for no saturation support
S
S
(A × B)], when used for an accumulation type of operation.
Table 4–9
(A × B)], when used for an accumulation type of operation.
S
(A × B)]]
lists the dynamic signals for the DSP block.
Function
Table 4–2 on page
Chapter 4: DSP Blocks in Stratix IV Devices
Stratix IV Operational Mode Descriptions
4–8. However, for
February 2011 Altera Corporation
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