DK-DEV-4SGX230N Altera, DK-DEV-4SGX230N Datasheet - Page 939

• Manufacturer Part Number: DK-DEV-4SGX230N
• Description: KIT DEVELOPMENT STRATIX IV
• Manufacturer: Altera
• Series: Stratix® IVr
• Type: FPGAr

Specifications of DK-DEV-4SGX230N

• Contents: Development Board, Universal Power Supply, Cables and Software
• Silicon Manufacturer: Altera
• Core Architecture: FPGA
• Core Sub-architecture: Stratix
• Silicon Core Number: EP4S
• Silicon Family Name: Stratix IV GX
• Rohs Compliant: Yes
• For Use With/related Products: EP4SGX230K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-2594

Chapter 5: Dynamic Reconfiguration in Stratix IV Devices
Functional Simulation of the Dynamic Reconfiguration Process
Figure 5–40. Resource Utilization in the ALTGX_RECONFIG MegaWizard Plug-In Manager
Functional Simulation of the Dynamic Reconfiguration Process
February 2011 Altera Corporation
Figure 5–40
Plug-In Manager.
This section describes the points to be considered during functional simulation of the
dynamic reconfiguration process.
■
■
■
You must connect the ALTGX_RECONFIG instance to the
ALTGX_instance/ALTGX instances in your design for functional simulation.
The functional simulation uses a reduced timing model for offset cancellation.
Therefore, the duration of the offset cancellation process is 16 reconfig_clk clock
cycles for functional simulation only.
The gxb_powerdown signal must not be asserted during the offset cancellation
sequence (for functional simulation and silicon).
shows resource utilization in the ALTGX_RECONFIG MegaWizard
Stratix IV Device Handbook Volume 2: Transceivers
5–93