DK-DEV-4SGX230N Altera, DK-DEV-4SGX230N Datasheet - Page 475

• Manufacturer Part Number: DK-DEV-4SGX230N
• Description: KIT DEVELOPMENT STRATIX IV
• Manufacturer: Altera
• Series: Stratix® IVr
• Type: FPGAr

Specifications of DK-DEV-4SGX230N

• Contents: Development Board, Universal Power Supply, Cables and Software
• Silicon Manufacturer: Altera
• Core Architecture: FPGA
• Core Sub-architecture: Stratix
• Silicon Core Number: EP4S
• Silicon Family Name: Stratix IV GX
• Rohs Compliant: Yes
• For Use With/related Products: EP4SGX230K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-2594

Chapter 1: Transceiver Architecture in Stratix IV Devices
Transceiver Block Architecture
Table 1–12. Transmission Bit Order for the Bit Reversal Feature
February 2011 Altera Corporation
Not enabled (default)
Enabled
Transmitter Bit Reversal
Feature
Transmitter Bit Reversal
Table 1–12
reversal enabled.
Figure 1–27
wide datapath configuration.
Figure 1–27. Transmitter Bit Reversal Operation in Basic Single-Width Mode
For example:
■
■
TX bit reversal option enabled in
the ALTGX MegaWizard
8-bit—D[7:0]rewired to D[0:7]
10-bit— D[9:0]rewired to D[0:9]
lists the transmission bit order with and without the transmitter bit
shows the transmitter bit reversal feature in Basic single-width for a 10-bit
Single-Width Mode
(8- or 10-Bit)
LSB to MSB
MSB to LSB
Output from transmitter PCS
D[9]
D[8]
D[7]
D[6]
D[5]
D[4]
D[3]
D[2]
D[1]
D[0]
For example:
■
■
Stratix IV Device Handbook Volume 2: Transceivers
16-bit—D[15:0]rewired to D[0:15]
20-bit—D[19:0]rewired to D[0:19]
Converted data output to the
transmitter serializer
Double-Width Mode
(16- or 20-Bit)
LSB to MSB
MSB to LSB
D[0]
D[1]
D[2]
D[3]
D[4]
D[5]
D[6]
D[7]
D[8]
D[9]
1–31