DK-DEV-4SGX230N Altera, DK-DEV-4SGX230N Datasheet - Page 771

• Manufacturer Part Number: DK-DEV-4SGX230N
• Description: KIT DEVELOPMENT STRATIX IV
• Manufacturer: Altera
• Series: Stratix® IVr
• Type: FPGAr

Specifications of DK-DEV-4SGX230N

• Contents: Development Board, Universal Power Supply, Cables and Software
• Silicon Manufacturer: Altera
• Core Architecture: FPGA
• Core Sub-architecture: Stratix
• Silicon Core Number: EP4S
• Silicon Family Name: Stratix IV GX
• Rohs Compliant: Yes
• For Use With/related Products: EP4SGX230K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-2594

Chapter 3: Configuring Multiple Protocols and Data Rates in Stratix IV Devices
Combining Channels Configured in Protocol Functional Modes
Combining Channels Configured in Protocol Functional Modes
February 2011 Altera Corporation
Combining Channels in Bonded Functional Modes
f
This section describes how to combine channels for various protocol functional
modes.
This section describes the combination requirements in the two variations of bonded
functional modes using transceiver PCS blocks. The two bonded functional modes
are:
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■
Bonded ×4 Functional Mode
The combination requirements for Basic x4, Deterministic Latency ×4, and PCIe x4
functional modes (if you do not use the PCIe hard IP block) are similar.
In this mode, the transmitter channels are synchronized to reduce skew. The
Quartus II software shares the control from physical transmitter channel 0 with the
other transmitter channels in the transceiver block. Therefore, when you an create an
instance in this mode, the logical transmit channel 0 (tx_dataout[0] in the instance)
must be assigned by the physical channel location 0 in the transceiver block.
The central clock divider block in the CMU0 channel forwards the high-speed serial and
low-speed parallel clocks to the transmitter channels.
This clocking scheme is described in the “Bonded Channel Configurations” section of
the
Because you used the central clock divider, the are two restrictions on the channel
combinations:
1. If you configure channels in bonded ×4 functional mode, the remaining
“Bonded ×4 Functional
■
■
■
“Bonded x8 Functional Mode” on page
■
■
transmitter channels (regular or CMU channels) within the transceiver block can
be used only in Basic (PMA Direct) ×1 or ×N mode.
1
The receiver channels are clocked independently. Therefore, you can configure the
unused receiver channels within a transceiver block in any allowed configuration.
Transceiver Clocking in Stratix IV Devices
Basic mode with the sub protocol set to ×4
XAUI
PCIe mode with the sub protocol set to Gen1 ×4 or Gen2 ×4.
Basic mode with the sub protocol ×8
PCIe mode with the sub protocol ×8
If PCIe functional mode uses the PCIe hard IP block, the combination
requirements are different. For more information, refer to
Channels Using the PCIe hard IP Block with Other Channels” on page
Mode”—Examples of bonded ×4 mode:
3–20—Examples of bonded ×8 mode:
chapter.
Stratix IV Device Handbook Volume 2: Transceivers
“Combining
3–24.
3–17