DK-DEV-4SGX230N Altera, DK-DEV-4SGX230N Datasheet - Page 28

• Manufacturer Part Number: DK-DEV-4SGX230N
• Description: KIT DEVELOPMENT STRATIX IV
• Manufacturer: Altera
• Series: Stratix® IVr
• Type: FPGAr

Specifications of DK-DEV-4SGX230N

• Contents: Development Board, Universal Power Supply, Cables and Software
• Silicon Manufacturer: Altera
• Core Architecture: FPGA
• Core Sub-architecture: Stratix
• Silicon Core Number: EP4S
• Silicon Family Name: Stratix IV GX
• Rohs Compliant: Yes
• For Use With/related Products: EP4SGX230K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-2594

Table 1–3. Stratix IV GX Device On-Package Decoupling Information
Notes to
(1)
(2) For I/O banks 3(*), 4(*), 7(*), and 8(*) only. There is no OPD for I/O bank 1(*), 2(*), 5(*), and 6(*).
EP4SGX110
EP4SGX180
EP4SGX230
EP4SGX290
EP4SGX360
EP4SGX530
EP4SGX70
Ordering Information
Table 1–3
Table
refers to production devices on-package decoupling. For more information about decoupling design of engineering sample (ES) devices, contact
1–3:
HH35
KH40
HF35
HF35
HF35
KF40
HF35
KF40
HF35
KF40
KF43
NF45
HF35
KF40
KF43
NF45
KF43
NF45
Table 1–3
2× 1 uF + 2× 470 nF
4× 1 uF + 4× 470 nF
4× 1 uF + 4× 470 nF
4× 1 uF + 4× 470 nF
lists the Stratix IV GX device on-package decoupling information.
2× 1uF + 2× 470nF
2× 1uF + 2× 470nF
2× 1uF + 2× 470nF
V
CC
10 nF per bank
10 nF per bank
10 nF per bank
10 nF per bank
10nF per bank
10nF per bank
10nF per bank
V
CCIO
(Note 1)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
100 nF per transceiver block
100 nF per transceiver block
100 nF per transceiver block
100 nF per transceiver block
100nF per transceiver block
100nF per transceiver block
100nF per transceiver block
V
CCL_GXB
V
100 nF
100 nF
100 nF
100nF
100nF
100nF
100nF
CCA_L/R
Altera Technical
1× 470nF + 1× 47nF per side
1× 470nF + 1× 47nF per side
1× 470nF + 1× 47nF per side
V
1× 470 nF + 1× 47 nF
1× 470 nF + 1× 47 nF
1× 470 nF + 1× 47 nF
1× 470 nF + 1× 47 nF
CCT
Support.
and V
per side
per side
per side
per side
CCR
(Shared)