DK-DEV-4SGX230N Altera, DK-DEV-4SGX230N Datasheet - Page 315
![KIT DEVELOPMENT STRATIX IV](/photos/28/41/284156/dk-dev-4sgx230n_sml.jpg)
DK-DEV-4SGX230N
Manufacturer Part Number
DK-DEV-4SGX230N
Description
KIT DEVELOPMENT STRATIX IV
Manufacturer
Altera
Series
Stratix® IVr
Type
FPGAr
Datasheets
1.EP4SGX110DF29C3N.pdf
(80 pages)
2.EP4SGX110DF29C3N.pdf
(1154 pages)
3.DK-DEV-4SGX230N.pdf
(2 pages)
4.DK-DEV-4SGX530N.pdf
(57 pages)
Specifications of DK-DEV-4SGX230N
Contents
Development Board, Universal Power Supply, Cables and Software
Silicon Manufacturer
Altera
Core Architecture
FPGA
Core Sub-architecture
Stratix
Silicon Core Number
EP4S
Silicon Family Name
Stratix IV GX
Rohs Compliant
Yes
For Use With/related Products
EP4SGX230K
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
544-2594
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DK-DEV-4SGX230N
Manufacturer:
Altera
Quantity:
135
- EP4SGX110DF29C3N PDF datasheet
- EP4SGX110DF29C3N PDF datasheet #2
- DK-DEV-4SGX230N PDF datasheet #3
- DK-DEV-4SGX530N PDF datasheet #4
- Current page: 315 of 1154
- Download datasheet (32Mb)
Chapter 8: High-Speed Differential I/O Interfaces and DPA in Stratix IV Devices
Source-Synchronous Timing Budget
February 2011 Altera Corporation
f
1
1
4. Select the LVDS receiver serial input ports (from the list) according to the input
5. In the Set Input Delay window, set the appropriate values in the Input Delay
6. Click Run to incorporate these values in the TimeQuest Timing Analyzer.
7. Assign the appropriate delay for all the LVDS receiver input ports following these
If no input delay is set in the TimeQuest Timing Analyzer, the receiver
channel-to-channel skew (RCCS) defaults to zero. You can also directly set the input
delay in a Synopsys Design Constraint file (.sdc) using the set_input_delay
command.
For more information about .sdc commands and the TimeQuest Timing Analyzer,
refer to the
Development Software Handbook.
Example 8–2
Example 8–2. RSKM
Data Rate: 1 Gbps, Board channel-to-channel skew = 200 ps
For Stratix IV devices:
TCCS = 100 ps (pending characterization)
SW = 300 ps (pending characterization)
TUI = 1000 ps
Total RCCS = TCCS + Board channel-to-channel skew= 100 ps + 200 ps
= 300 ps
RSKM= TUI - SW - RCCS
= 1000 ps - 300 ps - 300 ps
= 400 ps > 0
Because the RSKM > 0 ps, receiver non-DPA mode must work correctly.
You can also calculate RSKM using the steps described in
Enabled Differential Channels” on page
delay you set. Click OK.
Options section and Delay value.
steps. If you have already assigned Input Delay and you need to add more delay
to that input port, use the Add Delay option in the Set Input Delay window.
Quartus II TimeQuest Timing Analyzer
shows the RSKM calculation.
8–38.
chapter in volume 3 of the Quartus II
“Guidelines for DPA-
Stratix IV Device Handbook Volume 1
8–37
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