DK-DEV-4SGX230N Altera, DK-DEV-4SGX230N Datasheet - Page 597
DK-DEV-4SGX230N
Manufacturer Part Number
DK-DEV-4SGX230N
Description
KIT DEVELOPMENT STRATIX IV
Manufacturer
Altera
Series
Stratix® IVr
Type
FPGAr
Datasheets
1.EP4SGX110DF29C3N.pdf
(80 pages)
2.EP4SGX110DF29C3N.pdf
(1154 pages)
3.DK-DEV-4SGX230N.pdf
(2 pages)
4.DK-DEV-4SGX530N.pdf
(57 pages)
Specifications of DK-DEV-4SGX230N
Contents
Development Board, Universal Power Supply, Cables and Software
Silicon Manufacturer
Altera
Core Architecture
FPGA
Core Sub-architecture
Stratix
Silicon Core Number
EP4S
Silicon Family Name
Stratix IV GX
Rohs Compliant
Yes
For Use With/related Products
EP4SGX230K
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
544-2594
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DK-DEV-4SGX230N
Manufacturer:
Altera
Quantity:
135
- EP4SGX110DF29C3N PDF datasheet
- EP4SGX110DF29C3N PDF datasheet #2
- DK-DEV-4SGX230N PDF datasheet #3
- DK-DEV-4SGX530N PDF datasheet #4
- Current page: 597 of 1154
- Download datasheet (32Mb)
Chapter 1: Transceiver Architecture in Stratix IV Devices
Transceiver Block Architecture
Figure 1–121. XAUI and XGMII Layers
February 2011 Altera Corporation
Presentation
Model Layers
Application
Transport
Data Link
Reference
Network
Physical
Session
OSI
XAUI Mode
XAUI is an optional, self-managed interface that you can insert between the
reconciliation sublayer and the PHY layer to transparently extend the physical reach
of the XGMII.
XAUI addresses several physical limitations of the XGMII. XGMII signaling is based
on the HSTL Class 1 single-ended I/O standard, which has an electrical distance
limitation of approximately 7 cm. Because XAUI uses a low-voltage differential
signaling method, the electrical limitation is increased to approximately 50 cm.
Another advantage of XAUI is simplification of backplane and board trace routing.
XGMII is composed of 32 transmit channels, 32 receive channels, 1 transmit clock,
1 receive clock, 4 transmitter control characters, and 4 receive control characters for a
74-pin wide interface. XAUI, on the other hand, only consists of 4 differential
transmitter channels and 4 differential receiver channels for a 16-pin wide interface.
This reduction in pin count significantly simplifies the routing process in the layout
design.
Figure 1–121
shows the relationships between the XGMII and XAUI layers.
Optional
XGMII
Extender
Access/Collision Detect (CSMA/CD)
Media Access Control (MAC)
Logical Link Control (LLC)
LAN Carrier Sense Multiple
XGMII Extender Sublayer
XGMII Extender Sublayer
MAC Control (Optional)
Higher Layers
Reconciliation
Medium
10 Gb/s
Layers
PCS
PMA
PMD
Stratix IV Device Handbook Volume 2: Transceivers
Physical Layer Device
10 Gigabit Media Independent Interface
10 Gigabit Attachment Unit Interface
10 Gigabit Media Independent Interface
Medium Dependent Interface
1–153
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