DK-DEV-4SGX230N Altera, DK-DEV-4SGX230N Datasheet - Page 44

KIT DEVELOPMENT STRATIX IV

DK-DEV-4SGX230N

Manufacturer Part Number
DK-DEV-4SGX230N
Description
KIT DEVELOPMENT STRATIX IV
Manufacturer
Altera
Series
Stratix® IVr
Type
FPGAr

Specifications of DK-DEV-4SGX230N

Contents
Development Board, Universal Power Supply, Cables and Software
Silicon Manufacturer
Altera
Core Architecture
FPGA
Core Sub-architecture
Stratix
Silicon Core Number
EP4S
Silicon Family Name
Stratix IV GX
Rohs Compliant
Yes
For Use With/related Products
EP4SGX230K
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
544-2594

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
DK-DEV-4SGX230N
Manufacturer:
Altera
Quantity:
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Part Number:
DK-DEV-4SGX230N
Manufacturer:
ALTERA
0
2–8
Stratix IV Device Handbook Volume 1
ALM Operating Modes
This feature, called register packing, improves device utilization because the device
can use the register and the combinational logic for unrelated functions. Another
special packing mode allows the register output to feed back into the LUT of the same
ALM so that the register is packed with its own fan-out LUT. This provides another
mechanism for improved fitting. The ALM can also drive out registered and
unregistered versions of the LUT or adder output.
The Stratix IV ALM operates in one of the following modes:
Each mode uses ALM resources differently. In each mode, eleven available inputs to
an ALM—the eight data inputs from the LAB local interconnect, carry-in from the
previous ALM or LAB, the shared arithmetic chain connection from the previous
ALM or LAB, and the register chain connection—are directed to different destinations
to implement the desired logic function. LAB-wide signals provide clock,
asynchronous clear, synchronous clear, synchronous load, and clock enable control
for the register. These LAB-wide signals are available in all ALM modes.
For more information about the LAB-wide control signals, refer to
Signals” on page
The Quartus II software and supported third-party synthesis tools, in conjunction
with parameterized functions such as the library of parameterized modules (LPM)
functions, automatically choose the appropriate mode for common functions such as
counters, adders, subtractors, and arithmetic functions.
Normal
Extended LUT
Arithmetic
Shared Arithmetic
LUT-Register
2–4.
Chapter 2: Logic Array Blocks and Adaptive Logic Modules in Stratix IV Devices
February 2011 Altera Corporation
“LAB Control
Adaptive Logic Modules

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