MPC8536E-ANDROID Freescale Semiconductor, MPC8536E-ANDROID Datasheet - Page 1004

• Manufacturer Part Number: MPC8536E-ANDROID
• Description: HARDWARE/SOFTWARE ANDROID OS
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC ™r
• Type: MPUr

Specifications of MPC8536E-ANDROID

• Contents: Board
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

DMA Controller
15.3.1.8
The byte count register, shown in
Table 15-13
15.3.1.9
The next link descriptor address registers, shown in
for the next link descriptor in memory. Contents transferred to the current descriptor address registers
become effective for the current transfer in basic and extended chaining modes.
Table 15-14
15-18
Offset 0x128
Reset
6–31
0–26
Offset 0x120
Reset
Bits
Bits
0–5
27
W
R
W
R
0x1A8
0x228
0x2A8
0
0x1A0
0x220
0x2A0
0
Name
NLNDA
BC
Name
—
—
describes the fields of the BCRn.
describes the fields of the NLNDARn registers.
Byte Count Registers (BCR n )
Next Link Descriptor Address Registers (NLNDAR n and ENLNDAR n )
Reserved
Byte count. Contains the number of bytes to transfer. The value in this register is decremented after each DMA
read operation. The maximum transfer size is (2
—
Next link descriptor address. Contains the next link descriptor address in memory. The descriptor must be
aligned to a 32-byte boundary.
Reserved
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Figure 15-14. Next Link Descriptor Address Registers (NLNDAR n )
5
6
Figure 15-13. Byte Count Registers (BCR n )
Table 15-14. NLNDAR n Field Descriptions
Figure
Table 15-13. BCR n Field Descriptions
NLNDA
15-13, contains the number of bytes to transfer.
All zeros
Figure 15-14
All zeros
Description
26
Description
) – 1 bytes.
BC
and
26
Figure
—
27
15-15, contain the address
NDEOSIE
28
Freescale Semiconductor
Access: Read/Write
Access: Read/Write
29
—
30
EOLND
31
31