MPC8536E-ANDROID Freescale Semiconductor, MPC8536E-ANDROID Datasheet - Page 1084

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MPC8536E-ANDROID

Manufacturer Part Number
MPC8536E-ANDROID
Description
HARDWARE/SOFTWARE ANDROID OS
Manufacturer
Freescale Semiconductor
Series
PowerQUICC ™r
Type
MPUr

Specifications of MPC8536E-ANDROID

Contents
Board
For Use With/related Products
MPC8536
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PCI Bus Interface
Figure 16-56
respectively.
16.4.2.11 Configuration Cycles
This section describes PCI configuration cycles used for configuring standard PCI devices. The PCI
configuration space of any device is intended for configuration, initialization, and catastrophic
error-handling functions only. Access to the PCI configuration space should be limited to initialization and
error-handling software.
16.4.2.11.1 PCI Configuration Space Header
The first 64 bytes of the 256-byte configuration space consists of a predefined header that every PCI device
must support. The predefined header for all PCI devices is shown in
predefined header are defined the same for all PCI devices; the remaining 48 bytes of the header may have
differing layouts depending on the function of the device. Most PCI devices use the configuration header
16-58
PCI_C/BE[3:0]
PCI_C/BE[3:0]
PCI_DEVSEL
PCI_DEVSEL
PCI_AD[31:0]
PCI_AD[31:0]
PCI_FRAME
PCI_FRAME
PCI_TRDY
PCI_TRDY
PCI_IRDY
PCI_IRDY
PCI_CLK
PCI_CLK
and
Figure 16-57
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Lo-Addr
Lo-Addr
x’D’
x’D’
Figure 16-56. DAC Single-Beat Write Example
show timing examples for single-beat DAC writes and burst DAC writes,
Figure 16-57. DAC Burst Write Example
Hi-Addr
Hi-Addr
Cmd
Cmd
Data1
BE’s1
Data2
BE’s2
Byte Enables
Data
Data3
BE’s3
Figure
Data4
BE’s4
16-58. The first 16 bytes of the
T/A
T/A
T/A
T/A
Freescale Semiconductor

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