MPC8536E-ANDROID Freescale Semiconductor, MPC8536E-ANDROID Datasheet - Page 1545

• Manufacturer Part Number: MPC8536E-ANDROID
• Description: HARDWARE/SOFTWARE ANDROID OS
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC ™r
• Type: MPUr

Specifications of MPC8536E-ANDROID

• Contents: Board
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

23.5.1.8
To preserve cache coherency and otherwise avoid loss of system state, the core’s transition to low-power
modes is coordinated by a set of handshaking signals and protocols with all other MPC8536E functional
Freescale Semiconductor
(Time Base)
Core Timer
HID0[SLEEP]
Core Timer Facilities
HID0[DOZE]
Clock
HID0[NAP]
core_tbint
No
No
No
Power-Down Sequence Coordination
e500 Core Complex
Distribution
Snoopable
Instruction
Execution
Stopped?
Stopped?
Stopped?
MSR[WE]
Traffic
Clock
Yes
Yes
Yes
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Figure 23-35. MPC8536E Power Management Handshaking Signals
Stop Fetching
Instructions
Distribution
core_stopped
Stop Clock
HID0[TBEN]
core_halted
8
HID0[SEL_TBCLK]
CCB
Clock
sleep
doze
nap
Note: All signals shown are internal to the device.
POWMGTCSR[SLP]
POWMGTCSR[DPSLP]
core_halt
core_stop
core_tben
POWMGTCSR[DOZ]
Processor interrupt sources
(see
and
RTC
(Sampled and
Synchronized)
Device Logic
DEVDISR[E500]
Table
Table 9-1
DEVDISR[TB]or[E500]
9-2)
could have snooped
All transactions that
are complete
CKSTP_IN
HRESET
Global Utilities
23-53